MT58L1MY18D

ADVANCE 16Mb: 1 MEG x 18, 512K x 32/36 PIPELINED, DCD SYNCBURST SRAM 16Mb SYNCBURST™ SRAM FEATURES Fast clock and OE# access times Single +3.3V ±0.165Vor 2.5V ±0.125V power supply (VDD) Separate +3.3V or 2.5V isolated output buffer supply (VDDQ) SNOOZE MODE for reduced-power standby Common data inputs and data outputs Individual BYTE WRITE control and GLOBAL WRITE Three chip enables for simple depth expansion and address pipelining Clock-controlled and registered addresses, data I/Os and control signals Internally self-timed WRITE cycle Burst control (interleaved or linear burst) Automatic power-down 100-pin TQFP package 165-pin FBGA package Low capacitive bus loading x18, x32, and x36 versions available MT58L1MY18D, MT58V1MV18D, MT58L512Y32D, MT58V512V32D, MT58L512Y36D, MT58V512V36D 3.3V VDD, 3.3V or 2.5V I/O; 2.5V VDD, 2.5V I/O, Pipelined, Double-Cycle Deselect 100-Pin TQFP1 165-Pin FBGA (Preliminary Package Data) OPTIONS Timing (Access/Cycle/MHz) 3.5ns/6ns/166 MHz 4.0ns/7.5ns/133 MHz 5ns/10ns/100 MHz Configurations 3.3V VDD, 3.3V or 2.5V I/O 1 Meg x 18 512K x 32 512K x 36 2.5V VDD, 2.5V I/O 1 Meg x 18 512K x 32 512K x 36 TQFP MARKING* -6 -7.5 -10 NOTE: 1. JEDEC-standard MS-026 BHA (LQFP). MT58L1MY18D MT58L512Y32D MT58L512Y36D MT58V1MV18D MT58V512V32D MT58V512V36D T F None GENERAL DESCRIPTION The Micron® SyncBurst™ SRAM family employs highspeed, low-power CMOS designs that are fabricated using an advanced CMOS process. Micron’s 16...