MT58L512L18D

™ t e 8Mb SYNCBURST e h SRAMS 4U . m o c 8Mb: 512K x 18, 256K x 32/36 3.3V I/O, PIPELINED, DCD SYNCBURST SRAM MT58L512L18D, MT58L256L32D, MT58L256L36D 3.3V VDD, 3.3V I/O, Pipelined, DoubleCycle Deselect a D . FEATURES w w w ta Fast clock and OE# access times Single +3.3V +0.3V/-0.165V power supply (VDD) Separate +3.3V isolated output buffer supply (VDDQ) SNOOZE MODE for reduced-power standby Common data inputs and data outputs Individual BYTE WRITE control and GLOBAL WRITE Three chip enables for simple depth expansion and address pipelining Clock-controlled and registered addresses, data I/Os and control signals Internally self-timed WRITE cycle Burst control (interleaved or linear burst) Automatic power-down for portable applications 100-pin TQFP package 165-pin FBGA package Low capacitive bus loading x18, x32, and x36 versions available 100-Pin TQFP** OPTIONS Timing (Access/Cycle/MHz) 3.5ns/6ns/166 MHz 4.0ns/7.5ns/133 MHz 5ns/10ns/100 MHz Configurations 512K x 18 256K x 32 256K x 36 MARKING Packages 100-pin TQFP (2-chip enable) 100-pin TQFP (3-chip enable) 165-pin, 13mm x 15mm FBGA Operating Temperature Range Commercial (0°C to +70°C) Industrial (-40°C to +85°C)** Part Number Example w w w .D MT58L512L18D MT58L256L32D MT58L256L36D NOTE: 1. JEDEC-standard MS-026 BHA (LQFP). t a -6 -7.5 -10 T S F* None IT S a e h t e U 4 .c m o 165-Pin FBGA GENERAL DESCRIPTION The Micron® SyncBurst™ SRAM family employs highspeed...