MX28F2000P. 28F2000PPC Datasheet

28F2000PPC MX28F2000P. Datasheet pdf. Equivalent


MXIC 28F2000PPC
FEATURES
• 262,144 bytes by 8-bit organization
• Fast access time: 70/90/120 ns
• Low power consumption
– 50mA maximum active current
– 100uA maximum standby current
• Programming and erasing voltage 12V ± 5%
• Command register architecture
– Byte Programming (15us typical)
– Auto chip erase 5 seconds typical
(including preprogramming time)
– Block Erase
• Optimized high density blocked architecture
– Four 4-KB blocks (Top)
– Fourteen 16-KB blocks
– Four 4-KB blocks (Bottom)
MX28F2000P
2M-BIT [256K x 8] CMOS FLASH MEMORY
• Auto Erase (chip & block) and Auto Program
– DATA polling
– Toggle bit
• 10,000 minimum erase/program cycles
• Latch-up protected to 100mA from -1 to VCC+1V
• Advanced CMOS Flash memory technology
• Compatible with JEDEC-standard byte-wide 32-pin
EPROM pinouts
• Package type:
– 32-pin plastic DIP
– 32-pin PLCC
– 32-pin TSOP (Type 1)
GENERAL DESCRIPTION
The MX28F2000P is a 2-mega bit Flash memory or-
ganized as 256K bytes of 8 bits each. MXIC's Flash
memories offer the most cost-effective and reliable
read/write non-volatile random access memory. The
MX28F2000P is packaged in 32-pin PDIP, PLCC
and TSOP. It is designed to be reprogrammed and
erased in-system or in-standard EPROM program-
mers.
The standard MX28F2000P offers access times as
fast as 70 ns, allowing operation of high-speed
microprocessors without wait states. To eliminate
bus contention, the MX28F2000P has separate chip
enable (CE) and output enable (OE ) controls.
MXIC's Flash memories augment EPROM function-
ality with in-circuit electrical erasure and
programming. The MX28F2000P uses a command
register to manage this functionality, while
maintaining a standard 32-pin pinout. The
command register allows for 100% TTL level control
inputs and fixed power supply levels during erase
and programming, while maintaining maximum
EPROM compatibility.
MXIC Flash technology reliably stores memory con-
tents even after 10,000 erase and program cycles.
The MXIC cell is designed to optimize the erase and
programming mechanisms. In addition, the combi-
nation of advanced tunnel oxide processing and low
internal electric fields for erase and programming
operations produces reliable cycling. The
MX28F2000P uses a 12.0V ± 5% VPP supply to
perform the Auto Program/Erase algorithms.
The highest degree of latch-up protection is
achieved with MXIC's proprietary non-epi process.
Latch-up protection is proved for stresses up to 100
milliamps on address and data pin from -1V to VCC
+ 1V.
P/N: PM0380
1 REV. 1.5, OCT 29, 1998


28F2000PPC Datasheet
Recommendation 28F2000PPC Datasheet
Part 28F2000PPC
Description MX28F2000P
Feature 28F2000PPC; FEATURES • 262,144 bytes by 8-bit organization • Fast access time: 70/90/120 ns • Low power consumpt.
Manufacture MXIC
Datasheet
Download 28F2000PPC Datasheet




MXIC 28F2000PPC
MX28F2000P Block Address and Block Structure
A17~A0
3FFFFH
3F000H
3EFFFH
3E000H
3DFFFH
3D000H
3CFFFH
3C000H
3BFFFH
38000H
37FFFH
34000H
33FFFH
30000H
2FFFFH
2C000H
2BFFFH
28000H
27FFFH
24000H
23FFFH
20000H
1FFFFH
1C000H
1BFFFH
18000H
17FFFH
14000H
13FFFH
10000H
0FFFFH
0C000H
0BFFFH
08000H
07FFFH
04000H
03FFFH
03000H
02FFFH
02000H
01FFFH
01000H
00FFFH
00000H
4-K byte
4-K byte
4-K byte
4-K byte
16-K byte
16-K byte
16-K byte
16-K byte
16-K byte
16-K byte
16-K byte
16-K byte
16-K byte
16-K byte
16-K byte
16-K byte
16-K byte
16-K byte
4-K byte
4-K byte
4-K byte
4-K byte
MX28F2000P
P/N: PM0380
REV. 1.5, OCT 29, 1998
2



MXIC 28F2000PPC
PIN CONFIGURATIONS
32 PDIP
VPP
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1
Q2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32 VCC
31 WE
30 A17
29 A14
28 A13
27 A8
26 A9
25 A11
24 OE
23 A10
22 CE
21 Q7
20 Q6
19 Q5
18 Q4
17 Q3
32 PLCC
4
A7 5
1 32
30
29 A14
A6 A13
A5 A8
A4 A9
A3 9 MX28F2000P 25 A11
A2 OE
A1 A10
A0 CE
Q0 13
21 Q7
14 17 20
P/N: PM0380
MX28F2000P
TSOP (TYPE 1)
A11
A9
A8
A13
A14
A17
WE
VCC
VPP
A16
A15
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
MX28F2000P
(NORMAL TYPE)
32 OE
31 A10
30 CE
29 Q7
28 Q6
27 Q5
26 Q4
25 Q3
24 GND
23 Q2
22 Q1
21 Q0
20 A0
19 A1
18 A2
17 A3
OE
A10
CE
Q7
Q6
Q5
Q4
Q3
GND
Q2
Q1
Q0
A0
A1
A2
A3
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
MX28F2000P
(REVERSE TYPE)
1 A11
2 A9
3 A8
4 A13
5 A14
6 A17
7 WE
8 VCC
9 VPP
10 A16
11 A15
12 A12
13 A7
14 A6
15 A5
16 A4
PIN DESCRIPTION:
SYMBOL
A0~A17
Q0~Q7
CE
OE
WE
VPP
VCC
GND
PIN NAME
Address Input
Data Input/Output
Chip Enable Input
Output Enable Input
Write enable Pin
Program Supply Voltage
Power Supply Pin (+5V)
Ground Pin
REV. 1.5, OCT 29, 1998
3







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