DP8483

DP8483 TTL to 100k ECL Level Translator with Latch April 1990 DP8483 TTL to 100k ECL Level Translator with Latch General Description This circuit translates TTL input levels to ECL output levels and provides a fall-through latch The outputs are gated with CS providing for wire ORing of outputs The strobe and chip select inputs operate at ECL levels Features Y Y Y Y Y 16-pin DIP or S O ECL control inputs CS provided for wire ORing of output bus 100k ECL I O compatible 3 0 ns typical propagation delay Logic and Connection Diagram Dual-In-Line Package Truth Table D H L X X Q L H Q L STR L L H X CS H H H L H e high level (most positive) L e low level (most negative) X e don’t care Order Number DP8483J DP8483M or DP8483N See NS Package Number J16A M16B or N16A TL F 5864 – 1 Top View C1995 National Semiconductor Corporation TL F 5864 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Note 1) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications VEE Supply Voltage VCC Supply Voltage Input Voltage (ECL) Input Voltage (TTL) Output Current b 8V Maximum Power Dissipation at 25 C Molded Package Storage Temperature Derate molded package 11 8 mW C above 25 C 1476 mW b 65 C to a 150 C 7V GND to VEE b 1V to 5 5V 50 mA Recommended Operating Conditions VEE Supply Voltage VCC Supply Voltage TA Ambient Temperature b 4 5V a 7% 5 0V g 10% 0 C to 85 C Electrical Charact...