MC74F538

MC54/74F538 1-OF-8 DECODER WITH 3-STATE OUTPUTS The MC54 / 74F538 decoder/demultiplexer accepts three Address (A0 – A2) input signals and decodes them to select one of eight mutually exclusive outputs. A polarity control input (P) determines whether the outputs are active LOW or active HIGH. A HIGH Signal on either of the active LOW Output Enable (OE) inputs forces all outputs to the high impedance state. Two active HIGH and two active LOW input enables are available for easy expansion to 1-of-32 decoding with four packages, or for data demultiplexing to 1-of-8 or 1-of-16 destinations. 1-OF-8 DECODER WITH 3-STATE OUTPUTS FAST™ SCHOTTKY TTL Output Polarity Control Data Demultiplexing Capability Multiple Enables for Expansion 3-State Outputs ESD Protection > 4000 Volts CONNECTION DIAGRAM DIP (TOP VIEW) VCC O3 20 19 O4 18 A2 17 E1 16 E2 15 E3 14 E4 13 P 12 O7 11 20 1 J SUFFIX CERAMIC CASE 732-03 20 1 N SUFFIX PLASTIC CASE 738-03 1 O2 2 O1 3 O0 4 5 6 A0 7 A1 8 O5 9 10 20 1 DW SUFFIX SOIC CASE 751D-03 OE1 OE2 O6 GND ORDERING INFORMATION LOGIC DIAGRAM A2 A1 A0 E1 E2 E3 E4 16 15 14 13 4 5 OE1 OE2 O0 O1 O2 O3 O4 O5 O6 O7 E1 E2 E3 E4 OE1 OE2 O0 O1 O2 O3 O4 O5 O6 O7 3 2 1 14 18 VCC = PIN 20 GND = PIN 10 8 9 11 MC54FXXXJ Ceramic MC74FXXXN Plastic MC74FXXXDW SOIC LOGIC SYMBOL 12 P 6 A0 7 17 A1 A2 P Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. FAST AND LS...