WS512K32BV

WS512K32BV-XXXE 512Kx32 3.3V SRAM MODULE FEATURES s Access Times of 15†, 17, 20ns s MIL-STD-883 Compliant Devices Available s Low Voltage Operation s Packaging 66-pin, PGA Type, 1.385 inch square Hermetic Ceramic HIP (Package 402) 68 lead, Hermetic CQFP (G2), 22mm (0.880 inch) square (Package 500). Designed to fit JEDEC 68 lead 0.990" CQFJ footprint s Organized as 512Kx32; User Configurable as 1Mx16 or 2Mx8 s Radiation Tolerant with Epitaxial Layer Die s s s s s Commercial, Industrial and Military Temperature Ranges 3.3 Volt Power Supply BiCMOS TTL Compatible Inputs and Outputs Built-in Decoupling Caps and Multiple Ground Pins for Low Noise Operation s Weight WS512K32BV-XG2XE - 8 grams typical WS512K32NBV-XH2XE - 13 grams typical * This data sheet describes a product under development, not fully characterized, and is subject to change without notice. † This speed is Advanced information. PRELIMINARY* 4 PIN CONFIGURATION FOR WS512K32NBV-XH2XE TOP VIEW 1 I/O8 I/O9 I/O10 A13 A14 A15 A16 A17 I/O0 I/O1 I/O2 11 22 12 WE2 CS2 GND I/O11 A10 A11 A12 VCC CS1 NC I/O3 33 23 I/O15 I/O14 I/O13 I/O12 OE A18 WE1 I/O7 I/O6 I/O5 I/O4 I/O24 I/O25 I/O26 A6 A7 NC A8 A9 I/O16 I/O17 I/O18 44 34 VCC CS4 WE4 I/O27 A3 A4 A5 WE3 CS3 GND I/O19 55 45 I/O31 I/O30 56 SRAM MODULES PIN DESCRIPTION I/O0-31 A0-18 WE1-4 CS1-4 I/O29 I/O28 A0 A1 Data Inputs/Outputs Address Inputs Write Enables Chip Selects Output Enable Power Supply Ground Not Connected OE VCC GND NC BLOCK DIAGRAM A2 WE1 CS 1 WE2 CS2 W...