DM74S240

DM74S240 DM74S241 DM74S244 Octal 3-STATE Buffer/Line Driver/Line Receiver August 1986 Revised May 2000 DM74S240 DM74S241 DM74S244 Octal 3-STATE Buffer/Line Driver/Line Receiver General Description These buffers/line drivers are designed to improve both the performance and PC board density of 3-STATE buffers/ drivers employed as memory-address drivers, clock drivers, and bus-oriented transmitters/receivers. Featuring 400 mV of hysteresis at each low current PNP data line input, they provide improved noise rejection and high fanout outputs, and can be used to drive terminated lines down to 133Ω. Features s 3-STATE outputs drive bus lines directly s PNP inputs reduce DC loading on bus lines s Hysteresis at data inputs improves noise margins s Typical IOL (sink current) s Typical IOH (source current) Inverting Noninverting 4.5 ns 6 ns 64 mA −15 mA s Typical propagation delay times s Typical enable/disable times 9 ns s Typical power dissipation (enabled) Inverting Noninverting 450 mW 538 mW Ordering Code: Order Number DM74S240N DM74S241N DM74S244N Package Number N20A N20A N20A Package Description 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Connection Diagrams DM74S240N DM74S241N DM74S244N © 2000 Fairchild Semiconductor Corporation DS006478 www.fairchildsemi.com DM74S240 DM74S241 DM74S244 Abs...