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KM68V257C

Samsung Semiconductor

32K X 8 Bit High Speed CMOS Static RAM

PRELIMINARY w w . U 4 Static RAM(3.3V Operating), Evolutionary Pin out. 32Kx8 Bit High t Speed e e h Revision History...


Samsung Semiconductor

KM68V257C

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Description
PRELIMINARY w w . U 4 Static RAM(3.3V Operating), Evolutionary Pin out. 32Kx8 Bit High t Speed e e h Revision History S a t a D . w Document Title Rev No. History Rev. 0.0 Rev. 1.0 Initial release with Preliminary. Release to final Data Sheet. 1. Delete Preliminary Rev. 2.0 Rev. 3.0 2.1. Add 28-TSOP1 Package. 3.1. Delete DIP Package. 3.2. Delete 20ns part 3.3. Add Capacitive load of the test environment in A.C test load KM68V257C m o c CMOS SRAM Draft Data Remark Preliminary Final Jun. 1st, 1994 Oct. 4th, 1994 Feb. 22th, 1996 Feb. 25th, 1998 w w w .D t a S a e h t e U 4 .c m o Final Final The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any questions, please contact the SAMSUNG branch office near your office, call or contact Headquarters. -1- w w w .D at h S a t e e 4U . m o c Rev 3.0 February 1998 PRELIMINARY KM68V257C 32K x 8 Bit High-Speed CMOS Static RAM (3.3V Operating) FEATURES Fast Access Time 15, 17ns(Max.) Low Power Dissipation Standby (TTL) : 30mA(Max.) (CMOS) : 0.1mA(Max.) Operating KM68V257C - 15 : 90mA(Max.) KM68V257C - 17 : 80mA(Max.) Single 3.3±0.3V Power Supply TTL Compatible Inputs and Outputs Fully Static Operation - No Clock or Refresh required Three State Outputs 2V Minimum Data Retenti...




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