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TC58DVM82A1FT00

Toshiba Semiconductor

256-MBIT (32M x 8 BITS) CMOS NAND E2PROM

m o TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS .c U CMOS NAND E PROM 256-MBIT (32M × 8 BITS) 4 t DESCRIPTI...


Toshiba Semiconductor

TC58DVM82A1FT00

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Description
m o TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS .c U CMOS NAND E PROM 256-MBIT (32M × 8 BITS) 4 t DESCRIPTION e e h S a at .D w w FEATURES w 2 TC58DVM82A1FT00 The device is a 256-Mbit (276,824,064) bit NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as 528 bytes × 32 pages × 2048 blocks. The device uses single power supply (2.7 V to 3.6 V for VCC). The device has a 528-byte static register which allows program and read data to be transferred between the register and the memory cell array in 528-byte increments. The Erase operation is implemented in a single block unit (16 Kbytes + 512 bytes: 528 bytes x 32 pages). The device is a serial-type memory device which utilizes the I/O pins for both address and data input/output as well as for command inputs. The Erase and Program operations are automatically executed making the device most suitable for applications such as solid-state file storage, voice recording, image file memory for still cameras and other systems which require high-density non-volatile memory data storage. Organization Memory cell allay 528 × 64K × 8 Register 528 × 8 Page size 528 bytes Block size (16K + 512) bytes Modes Read, Reset, Auto Page Program Auto Block Erase, Status Read Mode control Serial input/output Command control Power supply Vcc: 2.7V to 3.6V Program/Erase Cycles 1E5 cycle (with ECC) Access time Cell array to register 25 µs max Serial Read Cycle 50 ns min Operating current Read (50 ns cycle)...




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