MX29LV800B

MX29LV800T/B & MX29LV800AT/AB 8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY Ready/Busy pin (RY/BY) - Provides a hardware method of detecting program or erase operation completion. Sector protection - Hardware method to disable any combination of sectors from program or erase operations - Temporary sector unprotected allows code changes in previously locked sectors. CFI (Common Flash Interface) compliant (for MX29LV800AT/AB) - Flash device parameters stored on the device and provide the host system to access 100,000 minimum erase/program cycles Latch-up protected to 100mA from -1V to VCC+1V Boot Sector Architecture - T = Top Boot Sector - B = Bottom Boot Sector Package type: - 44-pin SOP - 48-pin TSOP - 48-pin CSP (8x9mm for MX29LV800T/B; 6x8mm for MX29LV800AT/AB) Compatibility with JEDEC standard - Pinout and software compatible with single-power supply Flash 20 years data retention ister allows for 100% TTL level control inputs and fixed power supply levels during erase and programming, while maintaining maximum EPROM compatibility. MXIC Flash technology reliably stores memory contents even after 100,000 erase and program cycles. The MXIC cell is designed to optimize the erase and programming mechanisms. In addition, the combination of advanced tunnel oxide processing and low internal electric fields for erase and program operations produces reliable cycling. The MX29LV800T/B & MX29LV800AT/AB uses a 2.7V~3.6V VCC supply to perform the High...