LXT3008

w w w .D a S a t . U LXT3008 4 t e N+1 Protection Interface Unit T1/E1/J1 e h m o c Preliminary Datasheet The Intel® Protection Interface Unit (Intel® PIU), LXT3008, is a multiplexing element to be used in lieu of relays for more reliable and faster switching in a protection environment. It incorporates eight receivers and eight drivers in a single 160 ball PBGA package. The PIU is used in an N+1 redundancy scheme for Short Haul (SH) applications. It is used in conjunction with the Intel® LXT38x family of Line Interface Units (LIUs). Each PIU contains eight three-state drivers and high impedance receivers. On the analog side, these devices interface to the primary T1/E1 bus and can either drive it or stay in a non-intrusive, high impedance state. On the digital side, the PIU provides recovered clock and data and also accepts transmit input clock and data. The receive output clock and data signals can be tri-stated. Therefore, multiple PIU elements can be connected in parallel. Intel PIUs are controlled by hardware and therefore require no dedicated microprocessor. A 1x reference clock (1.544 MHz for T1 and 2.048 MHz for E1) is required for clock recovery. A single reference clock can feed all the PIUs in a protection matrix. Both the output analog drivers and the receive clock and data digital buffers can be tri-stated. PIUs also include three line buildout inputs (LEN0-2) for T1 DSX applications. For further information on N+1 Protection, please see Application Note...