Audio Application. CXD2555 Datasheet

CXD2555 Application. Datasheet pdf. Equivalent


Intersil Corporation CXD2555
® HI2555, CXD2555
September 1997
NOT RECOMMENDED FOR NEW DESIGNS
1-Bit, AD/DA Converter
For Audio Application
Features
Description
• Two-Channel AD/DA Converters and Their Respective
Digital Filters for Decimation and Oversampling Into a
Single Chip
The HI2555, CXD2555 is a 1-bit stereo AD/DA converter
featuring a 2nd-order DA system noise shaper. This LSI has
also built-in digital filters and provides good cost performance.
• Peripheral Analog Circuits for AD Converter Greatly
Reduces External Elements
• Distortion (Typ)
- ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.01%
- DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.008% (-3dB)
• S/N Ratio (Typ)
- ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .86dB
- DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .96dB
• Ripple in the Digital Filter Pass Band . . . . . . . ±0.05dB
• Attenuation in the Digital Filter Stop Band . . . . . . . .-45dB
Ordering Information
PART
NUMBER
HI2555JCQ
CXD2555Q
TEMP.
RANGE (oC)
PACKAGE
-20 to 75 48 Ld MPQF
-20 to 75 48 Ld MPQF
PKG. NO.
Q48.12x12-S
Q48.12x12-S
Functions
• Data Can Be Input/Output at Rate of 1 x fS with a Built-
In Digital Filter
• Simple Connection of Multiple HI2555, CXD2555s
Enable Multi-Channel System
• The 32-Slot Serial Data Interface Enables Independent
Selection of Data Frontward Packing/Rearward
Packing and MSB First/LSB First
• The Master Clock is Applicable to Four Sources
• 256fS, 512fS, 768fS, and 1024fS
• The Sampling Frequency May be Adjusted to Low fS
Frequencies Such as 16kHz or 8kHz, in Addition to
Normal Ones of 48kHz, 44.1kHz, and 32Hz
• Various Frequency Divider Clocks Can Be Output for
LSIs Chips Connected
Pinout
HI2555, CXD2555 (48 LEAD MQFP)
TOP VIEW
AVDD3
AOUT1-
AVSS3
UCLK
XCLK
XVDD
XTLI
XTLO
XVSS
AVSS4
AOUT2-
AVDD4
48 47 46 45 44 43 42 41 40 39 38 37
1 36
2 35
3 34
4 33
5 32
6 31
7 30
8 29
9 28
10 27
11 26
1213
14
15
16
17
18
19
20
21
22
23
25
24
XSL2
XSL1
XSL0
MLSL
MASL
DVSS
SOUT
SIN
BCK
LRCK
MS
DVDD
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
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File Number 4121.1


CXD2555 Datasheet
Recommendation CXD2555 Datasheet
Part CXD2555
Description AD/DA Converter For Audio Application
Feature CXD2555; ® HI2555, CXD2555 NE W DED FOR N E M M O C NOT RE DESIGNS September 1997 1-Bit, AD/DA Converter F.
Manufacture Intersil Corporation
Datasheet
Download CXD2555 Datasheet




Intersil Corporation CXD2555
Block Diagram
HI2555, CXD2555
36 35 34 8
7 54
SOUT 30
LRCK 27
BCK 28
SIN 29
CLOCK GENERATOR/ TIMING CIRCUIT
S P
S P
16
DIGITAL FILTER
(OVER SAMPLING
DECIMATION)
32 33
16
RAM
10
ROM
16
MAF1
16
MAF2
16
DAC1
16
DAC2
ADC1
ADC2
45 AIN1
16 AIN2
2 AOUT1(-)
48 AOUT1(+)
11 AOUT2(-)
13 AOUT2(+)
Pin Descriptions
PIN NO.
1
2
3
4
SYMBOL
AVDD 3
AOUT1(–)
AVSS 3
UCLK
5 XCLK
6 XVDD
7 XTLI
8 XTLO
9 XVSS
10 AVSS 4
11 AOUT2(-)
12 AVDD 4
12 AOUT2 (+)
14 AVSS 4
15 AVSS 2
16 AIN2
I/O DESCRIPTION
- Analog power supply for Channel-1 DA converter.
O Analog opposite-phase output of Channel-1 DA converter
- Analog GND for Channel-1 DA converter.
O Outputs a 1/2 frequency divider of the clock input form the oscillator pin XTLI (Pin 7). User
clock output for externally connected ICs.
O 256 fS clock output. this provides the master clock for ICs operating in the slave mode when
multiple CXD255Qs are connected. (When XSL2 = Low)
- Digital power supply for the master clock.
I Crystal oscillator circuit input. Connects the crystal oscillator selected by the crystal selection
pins XSLO to 2 (Pins 34, 35, and 36). Used to input the master clock from external.
O Crystal oscillator circuit output. Connects the crystal oscillator selected by the crystal selection
pins XSLO to 2 (Pins 34, 35, and 36).
- Digital GND for the master clock.
- Analog GND for Channel-2 DA converter.
O Analog opposite-phase output for Channel-2 DA converter.
- Analog power supply for Channel-2 DA converter.
O Analog in-phase output for Channel-2 DA converter.
- Analog GND for Channel-2 DA converter.
- Analog GND for Channel-2 AD converter.
I Analog input for Channel-2 AD converter.
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Intersil Corporation CXD2555
HI2555, CXD2555
Pin Descriptions (Continued)
PIN NO.
17
18
19
SYMBOL
AVDD 2
NC
SUB
I/O
-
-
-
20 NC -
21
DVSS
-
22
XMCK2
O
23
TEST
I
24
CLR
I
25
DVDD
-
26 MS I
27
LRCK
I/O
28
BCK
I/O
29 SIN I
30
SOUT
O
31
DVSS
-
32
MASL
I
33
MLSL
I
34
XSL0
I
35
XSL1
I
36
XSL2
I
37
DASL0
I
38
DASL1
I
39 WO I
40
DVDD
-
41 NC -
42 NC -
43
SUB
-
44
AVDD 1
-
45
AIN1
I
46
AVSS 1
-
47
AVSS 3
-
48
AOUT1(+)
O
DESCRIPTION
Analog power supply for Channel-2 AD converter.
Connected to the IC internal circuit board (same electric potential as power supply). Connect
to GND on the printed circuit board via a capacitor.
Digital GND.
IC measurement. Low is output normally.
Test pin. Normally fixed to Low. Equipped with a pull-down resistor.
System clear input. Normally High; cleared when Low. Equipped with a pull-up resistor.
Digital power supply.
Master/slave mode switching input. Master mode when High; slave mode when Low.
Equipped with a pull-up resistor.
Serial I/O sampling frequency clock. Output i master mode (Pin 26 = High); input in slave mode
(Pin 26 = Low). Transfers Channel-1 data when high, and Channel-2 data when Low.
Serial bit transfer clock (64 fS) for serial input data SIN and serial output data SOUT. Output
in master mode (Pin 26 = High); input in slave mode (Pin 26 = Low). Serial input data is re-
trieved at the rising edge; serial output data is transferred at the falling edge.
Two channels per sampling serial data input. Data format is represented by 2’s complements,
and consists of 32-bit slots.
Two channels per sampling serial data input. Data format is represented by 2’s complements,
and consists of 32-bit slots.
Digital GND.
Selects whether 16-bit serial data is place din the first 16-bit or the second 16-bit slots of the
serial I/O 32-bit slots. Forward packing when High; rearward packing when Low.
Selects whether 16-bit serial data is input/output at LSB-first or MSB-first. MSB-first when
High; LSB-first when Low.
Crystal selection. Selects the clock frequency to be input from XTLI (Pin 7) using three bits,
XSL 0 to 2.
Crystal selection. Selects the clock frequency to be input from XTLI (Pin 7) using three bits,
XSL 0 to 2.
Crystal selection. Selects the clock frequency to be input from XTLI (Pin 7) using three bits,
XSL 0 to 2.
IC measurement. Normally fixed to High.
IC measurement. Normally fixed to Low.
Synchronization window open input. Window masked when High; window open when Low
(forced synchronization). Equipped with a pull-up resistor.
Digital power supply
Connected to the IC internal circuit board (same electric potential as power supply). Connect
to GND on the printed circuit board via a capacitor.
Analog power supply for Channel-1 AD converter.
Analog input for Channel-1 AD converter.
Analog GND for Channel-1 AD converter.
Analog GND for Channel-1 DA converter.
Analog in-phase output for Channel-1 DA converter.
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