Motherboard Clock Generator
m PLL205-11 o c . Motherboard Clock Generator for AMD - K7 U t4 e FEATURES PIN CONFIGURATION e h • Generates all clock f...
Description
m PLL205-11 o c . Motherboard Clock Generator for AMD - K7 U t4 e FEATURES PIN CONFIGURATION e h Generates all clock frequencies for VIA K7 chip S sets requiring ta multiple CPU clocks and high speed a SDRAM buffers. Support pair of differential CPU clocks, one .D oneCPU, open-drain 6 PCI and 13 high-speed w SDRAM buffers for 3-DIMM applications. w w One 24_48MHz clock and one 48MHz clock.
Two14.318MHz reference clocks. Power management control to stop CPU. Support 2-wire I2C serial bus interface with builtin Vendor ID, Device ID and Revision ID. Single byte micro-step linear Frequency Programming via I2C with Glitch free smooth switching. Built-in programmable watchdog timer up to 63 seconds with 1-second interval. It will generate a LOW reset output when timer expired. Spread Spectrum ± 0.25% center spread, 0 to -0.5% down spread. 50% duty cycle with low jitter. Available in 300 mil 48 pin SSOP.
BLOCK DIAGRAM
XIN XOUT
XTAL OSC
FS (0:3)*
PLL1 SST SDATA SCLK
I2C Logic
Watch Dog
m o .c U 4 t e e h S a t a .D w w w
8 9 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
VDD0 REF0//CPU_STOP#^ GND XIN XOUT VDD1 PCI5/MODE*^ PCI0/FS3*^ GND PCI1/SEL24_48*^ PCI2 PCI3 PCI4 VDD2 SDRAMIN GND SDRAM11 SDRAM10 VDD3 SDRAM9 SDRAM8 GND SDATA SCLK
1 2 3 4 5 6 7
48 47 46 45 44 43 42
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
REF1/FS2*^ GND CPUT1 GND CPUC0 CPUT0 VDD3 PD/WDRESET# SDRAM12 GND SDRAM0 SDRAM1 VDD3 SDRAM2 SDRAM3 GND SDRAM4 SDRAM5 VDD3 SDRAM6 SDRAM7 V...
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