10-Bit nanoDAC. AD5611 Datasheet

AD5611 nanoDAC. Datasheet pdf. Equivalent


Analog Devices AD5611
Data Sheet
2.7 V to 5.5 V, <100 μA, 8-/10-/12-Bit
nanoDAC, SPI Interface in LFCSP and SC70
AD5601/AD5611/AD5621
FEATURES
6-lead SC70 and LFCSP packages
Micropower operation: 100 µA maximum at 5 V
Power-down typically to 0.2 µA at 3 V
2.7 V to 5.5 V power supply
Guaranteed monotonic by design
Power-on reset to 0 V with brownout detection
3 power-down functions
Low power serial interface with Schmitt-triggered inputs
On-chip output buffer amplifier, rail-to-rail operation
SYNC interrupt facility
Minimized zero-code error
AD5601 buffered 8-bit DAC
B version: ±0.5 LSB INL
AD5611 buffered 10-bit DAC
B version: ±0.5 LSB INL
A version: ±4 LSB INL
AD5621 buffered 12-bit DAC
B version: ±1 LSB INL
A version: ±6 LSB INL
APPLICATIONS
Voltage level setting
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
GENERAL DESCRIPTION
The AD5601/AD5611/AD5621, members of the nanoDAC®
family, are single, 8-/10-/12-bit, buffered voltage output DACs
that operate from a single 2.7 V to 5.5 V supply, consuming
typically 75 µA at 5 V. The parts come in tiny LFCSP and SC70
packages. Their on-chip precision output amplifier allows rail-
to-rail output swing to be achieved. The AD5601/AD5611/
AD5621 utilize a versatile 3-wire serial interface that operates at
clock rates up to 30 MHz and is compatible with SPI, QSPI™,
MICROWIRE™, and DSP interface standards.
The reference for the AD5601/AD5611/AD5621 is derived
from the power supply inputs and, therefore, gives the widest
dynamic output range. The parts incorporate a power-on reset
circuit, which ensures that the DAC output powers up to 0 V
and remains there until a valid write to the device takes place.
The AD5601/AD5611/AD5621 contain a power-down feature
that reduces current consumption to typically 0.2 µA at 3 V.
Rev. I
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FUNCTIONAL BLOCK DIAGRAM
VDD GND
POWER-ON
RESET
AD5601/AD5611/AD5621
DAC
REGISTER
REF(+)
12-/10-/8-BIT
DAC
OUTPUT
BUFFER
VOUT
INPUT
CONTROL
LOGIC
POWER-DOWN
CONTROL LOGIC
RESISTOR
NETWORK
SYNC SCLK SDIN
Figure 1.
Table 1. Related Devices
Part Number Description
AD5641
2.7 V to 5.5 V, <100 µA, 14-bit nanoDAC in
SC70 and LFCSP packages
They also provide software-selectable output loads while in
power-down mode. The parts are put into power-down mode
over the serial interface.
The low power consumption of these parts in normal operation
makes them ideally suited to portable battery-operated equip-
ment. The combination of small package and low power makes
these nanoDAC devices ideal for level-setting requirements,
such as generating bias or control voltages in space-constrained
and power-sensitive applications.
PRODUCT HIGHLIGHTS
1. Available in 6-lead LFCSP and SC70 packages.
2. Low power, single-supply operation. The AD5601/
AD5611/AD5621 operate from a single 2.7 V to 5.5 V
supply with a maximum current consumption of 100 µA,
making them ideal for battery-powered applications.
3. The on-chip output buffer amplifier allows the output of
the DAC to swing rail-to-rail with a typical slew rate of
0.5 V/µs.
4. Reference is derived from the power supply.
5. High speed serial interface with clock speeds up to
30 MHz. Designed for very low power consumption.
The interface powers up only during a write cycle.
6. Power-down capability. When powered down, the DAC
typically consumes 0.2 µA at 3 V. Power-on reset with
brownout detection.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2005–2019 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com


AD5611 Datasheet
Recommendation AD5611 Datasheet
Part AD5611
Description 10-Bit nanoDAC
Feature AD5611; Data Sheet 2.7 V to 5.5 V, <100 μA, 8-/10-/12-Bit nanoDAC, SPI Interface in LFCSP and SC70 AD5601/A.
Manufacture Analog Devices
Datasheet
Download AD5611 Datasheet




Analog Devices AD5611
AD5601/AD5611/AD5621
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Timing Characteristics ................................................................ 4
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configurations and Function Descriptions ........................... 6
Typical Performance Characteristics ............................................. 7
Terminology .................................................................................... 13
Theory of Operation ...................................................................... 14
DAC Section................................................................................ 14
Resistor String ............................................................................. 14
Output Amplifier........................................................................ 14
Serial Interface ............................................................................ 14
Input Shift Register .................................................................... 14
SYNC Interrupt .......................................................................... 14
Power-On Reset.......................................................................... 16
Power-Down Modes .................................................................. 16
Microprocessor Interfacing....................................................... 16
Applications Information .............................................................. 18
Choosing a Reference as Power Supply for the
AD5601/AD5611/AD5621 ....................................................... 18
Bipolar Operation Using the AD5601/AD5611/AD5621..... 18
Using the AD5601/AD5611/AD5621 with a Galvanically
Isolated Interface ........................................................................ 19
Power Supply Bypassing and Grounding................................ 19
Outline Dimensions ....................................................................... 20
Ordering Guide .......................................................................... 21
REVISION HISTORY
4/2019—Rev. H to Rev. I
Changes to Table 2............................................................................ 5
Change to Figure 16 ......................................................................... 8
Updated Outline Dimensions ....................................................... 20
Changes to Ordering Guide .......................................................... 21
2/2016—Rev. G to Rev. H
Changes to Noise Parameter, Table 2 ............................................. 3
Changes to Serial Interface Section.............................................. 14
6/2013—Rev. F to Rev. G
Change to Ordering Guide............................................................ 21
2/2012—Rev. E to Rev. F
Added 6-Lead LFCSP.........................................................Universal
Changes to Features Section, General Description Section,
Table 1, and Product Highlights Section ....................................... 1
Changes to Table 4............................................................................ 5
Added Figure 4; Renumbered Sequentially .................................. 6
Changes to Table 5............................................................................ 6
Changes to Choosing a Reference as Power Supply for the
AD5601/AD5611/AD5621 Section.............................................. 18
Updated Outline Dimensions ....................................................... 20
Changes to Ordering Guide .......................................................... 21
7/2010—Rev. D to Rev. E
Changes to Figure 1.......................................................................... 1
5/2008—Rev. C to Rev. D
Changes to General Description Section .......................................1
Changes to Table 2.............................................................................3
Changes to Choosing a Reference as Power Supply for the
AD5601/AD5611/AD5621 Section.............................................. 18
Changes to Ordering Guide .......................................................... 20
12/2007—Rev. B to Rev. C
Changes to Features ..........................................................................1
Changes to Table 2.............................................................................3
Changes to AD5601/AD5611/AD5621 to ADSP-2101
Interface Section ............................................................................. 16
Updated Outline Dimensions....................................................... 20
Changes to Ordering Guide .......................................................... 20
7/2005—Rev. A to Rev. B
Changes to Figure 48...................................................................... 17
Changes to Galvanically Isolated Interface Section ................... 19
Changes to Figure 52...................................................................... 19
3/2005—Rev. 0 to Rev. A
Changes to Timing Characteristics.................................................4
Changes to Absolute Maximum Ratings........................................5
Changes to Full Scale Error Section................................................7
Changes to Figure 20...................................................................... 10
Changes to Theory of Operation.................................................. 14
Changes to Power Down Modes .................................................. 15
1/2005—Revision 0: Initial Version
Rev. I | Page 2 of 21



Analog Devices AD5611
Data Sheet
AD5601/AD5611/AD5621
SPECIFICATIONS
VDD = 4.5 V to 5.5 V; RL = 2 kΩ to GND; CL = 200 pF to GND; all specifications TMIN to TMAX, unless otherwise noted. Temperature range
for A/B grades is −40°C to +125°C, typical at 25°C.
Table 2.
Parameter
STATIC PERFORMANCE
AD5601
Resolution
Relative Accuracy1 (INL)
Differential Nonlinearity (DNL)
AD5611
Resolution
Relative Accuracy1 (INL)
Differential Nonlinearity (DNL)
AD5621
Resolution
Relative Accuracy1 (INL)
Differential Nonlinearity (DNL)
Zero-Code Error
Full-Scale Error
Offset Error
Gain Error
Zero-Code Error Drift
Gain Temperature Coefficient
OUTPUT CHARACTERISTICS2
Output Voltage Range
Output Voltage Settling Time
Slew Rate
Capacitive Load Stability
Output Noise Spectral Density
Noise
A Grade
Min Typ
Max
B Grade
Min Typ
Max
Unit
8
10
±4
±0.5
12
±6
±0.5
0.5 10
±0.5
±0.063 ±10
±0.0004 ±0.037
5.0
2.0
0
6
VDD 0
10
0.5
470
1000
120
2
Bits
±0.5 LSB
±0.5 LSB
Bits
±0.5 LSB
±0.5 LSB
0.5
±0.5
±0.063
±0.0004
5.0
2.0
±1
±0.5
10
±10
±0.037
Bits
LSB
LSB
mV
mV
mV
%FSR
µV/°C
ppm
FSR/°C
VDD V
6 10 µs
0.5 V/µs
470 pF
1000
pF
120 nV/Hz
2 µV rms
Digital-to-Analog Glitch Impulse
Digital Feedthrough
Short-Circuit Current
DC Output Impedance
LOGIC INPUTS
Input Current3
Input High Voltage, VINH
Input Low Voltage, VINL
1.8
1.4
5
0.2
15
0.5
Pin Input Capacitance
3
5
0.2
15
0.5
±2
1.8
1.4
0.8
0.6
3
nV-s
nV-s
mA
±2 µA
V
V
0.8 V
0.6 V
pF
Test Conditions/Comments
Guaranteed monotonic by design
Guaranteed monotonic by design
Guaranteed monotonic by design
All 0s loaded to DAC register
All 1s loaded to DAC register
Code ¼ scale to ¾ scale
RL = ∞
RL = 2 kΩ
DAC code = midscale,1 kHz
DAC code = midscale,
0.1 Hz to 10 Hz bandwidth
1 LSB change around major carry
VDD = 3 V/5 V
VDD = 4.7 V to 5.5 V
VDD = 2.7 V to 3.6 V
VDD = 4.7 V to 5.5 V
VDD = 2.7 V to 3.6 V
Rev. I | Page 3 of 21







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