Low Phase Noise PECL XO
m Preliminary PLL602-13 o c . Low Phase Noise PECL XO (12 – 24MHz Crystals) 192MHz – 384MHz U 4 t e FEATURES PIN CONFIGU...
Description
m Preliminary PLL602-13 o c . Low Phase Noise PECL XO (12 – 24MHz Crystals) 192MHz – 384MHz U 4 t e FEATURES PIN CONFIGURATION e h S output for the 192MHz to Low phase noise a 384MHz range t (-134 dBc at 10kHz offset). a PECL output. D24MHz crystal input. 12 . to w Integrated crystal load capacitor: no external wload capacitor required. w Output Enable selector.
VDD 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VDD VDD XIN GND_BUF CLKBAR
3.3V operation. Available in 16 Pin TSSOP or SOIC.
DESCRIPTION
The PLL602-13 is a monolithic low jitter and low phase noise (-134dBc/Hz @ 10kHz offset) XO IC with PECL output, for 192MHz to 384MHz output range. It provides a low phase noise reference frequency using a low cost crystal. The chip delivers an output frequency of F XIN x 16. This makes the PLL602-13 ideal for a wide range of applications.
BLOCK DIAGRAM
Reference Divider
XIN XOUT
XTAL OSC
m o .c U 4 t e e h S a t a .D w w w
XOUT OE N/C GND GND F OUT = F XIN x 16
PLL 602-13
VDD_BUF CLK
GND_BUF GND GND
OE (Pin 5) 0 1 (Default)
Output State
Tri-state Output enabled
VCO Divider
Phase Comparator
Charge Pump
Loop Filter
VCO
CLKBAR CLK
OE
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
m o .c U 4 t e e h S a at .D w w w
Rev 07/17/01 Page 1
Preliminary
PLL602-13
192MHz – 384MHz Low Phase Noise PECL XO (12 – 24MHz Crystals)
PIN DESCRIPTIONS
Name VDD XIN XOUT OE N/C GND GND_BUF CLK VDD_BUF CLKB Number 1,2,16 3 4 5 6 7,8,9...
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