Document
1-of-8 Decoder/ Demultiplexer
High−Performance Silicon−Gate CMOS
MC74HC138A
The MC74HC138A is identical in pinout to the LS138. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.
The HC138A decodes a three−bit Address to one−of−eight active−low outputs. This device features three Chip Select inputs, two active−low and one active−high to facilitate the demultiplexing, cascading, and chip−selecting functions. The demultiplexing function is accomplished by using the Address inputs to select the desired device output; one of the Chip Selects is used as a data input while the other Chip Selects are held in their active states.
Features
Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 mA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC
Standard No. 7 A
Chip Complexity: 100 FETs or 29 Equivalent Gates NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable*
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
DATA SHEET www.onsemi.com
16
1
TSSOP−16 DT SUFFIX CASE 948F
16 1
SOIC−16 D SUFFIX CASE 751B
MARKING DIAGRAMS
16
HC 138A ALYWG
G
1
16
HC138AG AWLYWW
1
A L, WL Y, YY W, WW G or G
= Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package
(Note: Microdot may be in either location)
PIN ASSIGNMENT
A0 1 A1 2 A2 3 CS2 4 CS3 5 CS1 6 Y7 7 GND 8
16 VCC 15 Y0 14 Y1 13 Y2 12 Y3 11 Y4 10 Y5 9 Y6
Semiconductor Components Industries, LLC, 2012
July, 2022 − Rev. 13
ORDERING INFORMATION
Device MC74HC138ADG
Package
SOIC−16 (Pb−Free)
Shipping†
48 Units / Rail
MC74HC138ADR2G MC74HC138ADTR2G NLV74HC138ADR2G* NLV74HC138ADTR2G*
SOIC−16 (Pb−Free)
TSSOP−16 (Pb−Free)
SOIC−16 (Pb−Free)
TSSOP−16 (Pb−Free)
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.
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Publication Order Number:
MC74HC138A/D
MC74HC138A
ADDRESS INPUTS
A0 1 A1 2 A2 3
CHIPSELECT INPUTS
CS1 6 CS2 4 CS3 5
15 Y0 14 Y1 13 Y2 12 Y3
11 Y4 10
Y5 9 Y6 7
Y7
ACTIVE-LOW OUTPUTS
PIN 16 = VCC PIN 8 = GND
Figure 1. Logic Diagram
FUNCTION TABLE
Inputs
Outputs
CS1CS2 CS3 A2 A1 A0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
X X H XXX HHHHHHH H X H X XXX HHHHHHH H L X X XXX HHHHHHH H
H L L LLL LHHHHHHH H L L LLHH L HHHHHH H L L LHL HH L HHHHH H L L LHH H H H L H H H H
H L L HLL HHHH L HHH H L L HLHHHHHH L HH H L L HHL H H H H H H L H H L L HHH H H H H H H H L
H = high level (steady state); L = low level (steady state); X = don’t care
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VCC DC Supply Voltage (Referenced to GND)
Vin DC Input Voltage (Referenced to GND)
Vout DC Output Voltage (Referenced to GND)
Iin
DC Input Current, per Pin
Iout DC Output Current, per Pin
ICC DC Supply Current, VCC and GND Pins
PD Power Dissipation in Still Air SOIC Package† TSSOP Package†
–0.5 to +7.0
V
–0.5 to VCC + 0.5
V
–0.5 to VCC + 0.5
V
20
mA
25
mA
50
mA
mW 500 450
Tstg Storage Temperature
–65 to +150
_C
TL Lead Temperature, 1 mm from Case for 10 Seconds
_C
(SOIC or TSSOP Package)
260
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. †Derating − SOIC Package: – 7 mW/_C from 65_ to 125_C
TSSOP Package: − 6.1 .W/_C from 65_ to 125_C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max Unit
VCC DC Supply Voltage (Referenced to GND)
2.0
6.0
V
Vin, Vout DC Input Voltage, Output Voltage (Referenced to GND)
0
VCC
V
TA Operating Temperature, All Package Types
–55
+125 _C
tr, tf Input Rise and Fall Time (Figure 2)
VCC = 2.0 V
0
VCC = 4.5 V
0
VCC = 6.0 V
0
1000
ns
500
400
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability.
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high−impedance circuit. For proper operation, Vin and Vout should be constrained to the range GND v (Vin or Vout) v VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.
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MC74HC138A
DC ELECTRICAL CHARACTERISTICS (Volta.