v4.2
eX Family FPGAs
FuseLock
Leading Edge Performance
240 MHz System Performance 350 MHz Internal Performance 3.9 ns Clock-to-Out (Pad-to-Pad)
Specifications
3,000 to 12,000 Available System Gates Maximum 512 Flip-Flops (Using CC Macros) 0.22µm CMOS Process Technology Up to 132 User-Programmable I/O Pins
Features
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