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NT256D64S88ABG Dataheets PDF



Part Number NT256D64S88ABG
Manufacturers Nanya Technology
Logo Nanya Technology
Description 256MB DIMM
Datasheet NT256D64S88ABG DatasheetNT256D64S88ABG Datasheet (PDF)

NT256D64S88ABG 256MB : 32M x 64 PC2700 Unbuffered DIMM 184pin One Bank Unbuffered DDR SDRAM MODULE Based on DDR333 32Mx8 SDRAM Features • Performance: • 184-Pin Unbuffered 8-Byte Dual In-Line Memory Module • 32Mx64 Double Data Rate (DDR) SDRAM DIMM w w a D . w S a t e e h U 4 t m o .c • DRAM DLL aligns DQ and DQS transitions with clock transitions. • Address and control signals are fully synchronous to positive clock edge Unit 2 133 7.5 266 MHz ns MHz • Programmable Operation: - DIMM CA.

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NT256D64S88ABG 256MB : 32M x 64 PC2700 Unbuffered DIMM 184pin One Bank Unbuffered DDR SDRAM MODULE Based on DDR333 32Mx8 SDRAM Features • Performance: • 184-Pin Unbuffered 8-Byte Dual In-Line Memory Module • 32Mx64 Double Data Rate (DDR) SDRAM DIMM w w a D . w S a t e e h U 4 t m o .c • DRAM DLL aligns DQ and DQS transitions with clock transitions. • Address and control signals are fully synchronous to positive clock edge Unit 2 133 7.5 266 MHz ns MHz • Programmable Operation: - DIMM CAS Latency: 2, 2.5 - Burst Type: Sequential or Interleave - Burst Length: 2, 4, 8 - Operation: Burst Read and Write PC2700 -6 2.5 166 6 333 Speed Sort DIMM CAS Latency f CK Clock Frequency t CK Clock Cycle f DQ DQ Burst Frequency • Intended for 100 MHz and 133 MHz applications • Inputs and outputs are SSTL-2 compatible • VDD = 2.5Volt ± 0.2, VDDQ = 2.5Volt ± 0.2 • SDRAMs have 4 internal banks for concurrent operation • Module has one physical bank • Differential clock inputs • Data is read or written on both clock edges • Auto-Refresh (CBR) and Self-Refresh Modes • 13/10/1 Addressing (row/column/bank) • Serial Presence Detect • Gold contacts • Automatic and controlled precharge commands • 7.8 µs Max. Average Periodic Refresh Interval • SDRAMs in 66-pin TSOP Type II Package Description NT256D64S88ABG is an unbuffered 184-Pin Double Data Rate (DDR) Synchronous DRAM Dual In-Line Memory Module (DIMM), organized as a one-bank high-speed memory array. The 32Mx64 module is a single-bank DIMM that uses eight 32Mx8 DDR SDRAMs in 400 mil TSOP packages. The DIMM achieves high-speed data transfer rates of up to 333MHz. The DIMM is intended for use in applications operating from 133 MHz to 166 MHz clock speeds with data rates of 266 to 333 MHz. Clock enable CKE0 controls all devices on the DIMM. Prior to any access operation, the device CAS latency and burst type/ length/operation type must be programmed into the DIMM by address inputs A0-A12 and I/O inputs BA0 and BA1 using the mode register set cycle. These DIMMs are manufactured using raw cards developed for broad industry use as reference designs. The use of these common design files minimizes electrical variation between suppliers. The DIMM uses serial presence detects implemented via a serial EEPROM using the two-pin IIC protocol. The first 128 bytes of serial PD data are programmed and locked during module assembly. The last 128 bytes are available to the customer. All NANYA 184 DDR SDRAM DIMMs provide a high-performance, flexible 8-byte interface in a 5.25” long space-saving footprint. Ordering Information Part Number NT256D64S88ABG-6 Speed 166MHz (6ns @ CL = 2.5) 133MHz (7.5ns @ CL= 2) PC2700 Organization 32Mx64 Leads Gold Power w w w t a .D S a e h U 4 t e .c m o REV 1.1 08/2002 1 NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice. w w w .D a S a t e e h U 4 t 2.5V m o .c © NANYA TECHNOLOGY CORP. NT256D64S88ABG 256MB : 32M x 64 PC2700 Unbuffered DIMM Pin Description CK0, CK1, CK2 CK0, CK1, CK2 CKE0 RAS CAS WE S0 A0-A9, A11, A12 A10/AP BA0, BA1 VREF VDDID Differential Clock Inputs Clock Enable Row Address Strobe Column Address Strobe Write Enable Chip Selects Address Inputs Address Input/Auto-precharge SDRAM Bank Address Inputs Ref. Voltage for SSTL_2 inputs VDD Identification flag. DQ0-DQ63 DQS0-DQS7, DQS9-DQS16 VDD VDDQ VSS NC SCL SDA SA0-2 VDDSPD Data input/output Bi-directional data strobes Power (2.5V) Supply voltage for DQs (2.5V) Ground No Connect Serial Presence Detect Clock Input Serial Presence Detect Data input/output Serial Presence Detect Address Inputs Serial EEPROM positive power supply (2.5V) Pinout Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Front VREF DQ0 VSS DQ1 DQS0 DQ2 VDD DQ3 NC NC VSS DQ8 DQ9 DQS1 VDDQ CK1 CK1 VSS DQ10 DQ11 CKE0 VDDQ DQ16 DQ17 DQS2 VSS A9 DQ18 A7 VDDQ DQ19 Pin 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 Back VSS DQ4 DQ5 VDDQ DQS9 DQ6 DQ7 VSS NC NC NC VDDQ DQ12 DQ13 DQS10 VDD DQ14 DQ15 NC VDDQ NC DQ20 A12 VSS DQ21 A11 DQS11 VDD DQ22 A8 DQ23 53 54 55 56 57 58 59 60 61 Pin 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 KEY DQ32 VDDQ DQ33 DQS4 DQ34 VSS BA0 DQ35 DQ40 145 146 147 148 149 150 151 152 153 Front A5 DQ24 VSS DQ25 DQS3 A4 VDD DQ26 DQ27 A2 VSS A1 NC NC VDD NC A0 NC VSS NC BA1 Pin 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 Back VSS A6 DQ28 DQ29 VDDQ DQS12 A3 DQ30 VSS DQ31 NC NC VDDQ CK0 CK0 VSS NC A10 NC VDDQ NC KEY VSS DQ36 DQ37 VDD DQS13 DQ38 DQ39 VSS DQ44 Pin 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 Front VDDQ WE DQ41 CAS VSS DQS5 DQ42 DQ43 VDD NC DQ48 DQ49 VSS CK2 CK2 VDDQ DQS6 DQ50 DQ51 VSS VDDID DQ56 DQ57 VDD DQS7 DQ58 DQ59 VSS NC SDA SCL Pin 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173.


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