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FEATURES • • • • • • • • •
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Four Quadrant Multiplication 16-Bit Monotonicity Lower Data Bus Feedthrough @ CS = 1 Low Feedthrough Error Low Power Consumption TTL/5 V CMOS Compatible Double Buffered Decoded DAC Approach Latch-Up Free
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MP7636A
15 V CMOS Microprocessor Compatible Double-Buffered, Multiplying 16-Bit Digital-to-Analog Converter
BENEFITS • High Accuracy Performance at Low Cost • Easy Interface with 8-Bit Microprocessors • Simple Upgrade of MP1230A Family to High Accuracy (Pin Compatible) • Reduced Board Space • 16-Bit Bus Version: MP7626
GENERAL DESCRIPTION
The MP7636A is manufactured using advanced thin film resistors on a double metal CMOS process. The MP7636A incorporates a unique bit decoding technique yielding lower glitch, higher speed and excellent accuracy over temperature and time. 16-bit differential non-linearity is achieved with minimal laser trim. The MP7636A is packaged in a 20-pin 300 mil wide DIP and is a direct 16-bit replacement for the 12-bit DAC1230 series. Full
pin-for-pin compatibility allows existing systems to be upgraded to 16 bits without hardware modification. The MP7636A provides 16-bit data loading through 8 input data lines for direct interface to 8-bit data buses. All data loading and data transfer operations are identical to the WRITE cycle of a static RAM. The MP7636A uses a unique circuit which significantly reduces transients in the supplies during DATA bus transitions at CS = 1.
SIMPLIFIED BLOCK DIAGRAM
DB15 (MSB) (DB7) DB14 (DB6) DB13 (DB5) DB12 (DB4) DB11 (DB3) DB10 (DB2) DB9 (DB1) DB8 (DB0, LSB)
When LE = 1 latch outputs follow inputs When LE = 0 Latch outputs are latched
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8-Bit Input Latch
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16-Bit Register
16-Bit MDAC
RFB IOUT1 IOUT2
8-Bit Input Latch
BYTE1/BYTE2 CS WR1 XFER WR2
LE
VDD
VREF
DGND
Rev. 2.00 1
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AGND
MP7636A
ORDERING INFORMATION
Package Type
SOIC SOIC
Temperature Range
–40 to +85°C –40 to +85°C
Part No.
MP7636AJS MP7636AKS
INL (LSB)
+4 +2
DNL (LSB)
+4 +2
Gain Error (% FSR)
0.1 0.1
*Contact factory for non-compliant military processing
PIN CONFIGURATION
See Packaging Section for Package Dimensions
CS WR1 AGND DB11 (DB3) DB10 (DB2) DB9 (DB1) DB8 (DB0, LSB) VREF RFB DGND
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
VDD BYTE1/BYTE2 WR2 XFER DB12 (DB4) DB13 (DB5) DB14 (DB6) DB15 (MSB) (DB7) IOUT2 IOUT1
20 Pin SOIC (Jedec, 0. 300”) S20
PIN OUT DEFINITIONS
PIN NO. 1 2 3 4 5 6 7 8 9 10 11 NAME CS WR1 AGND DB11 (DB3) DB10 (DB2) DB9 (DB1) DB8 (DB0) VREF RFB DGND IOUT1 DESCRIPTION Chip Select (Active Low) Write1 (Active Low) Analog Ground Data Input Bit 11 (MSB) Data Input Bit 3 Data Input Bit 10 Data Input Bit 2 Data Input Bit 9 Data Input Bit 1 Data Input Bit 8 Data Input Bit 0 (LSB) Reference Input Voltage Internal Feedback Resistor Digital Ground Current Output 1 20 14 15 16 17 18 19 PIN NO. 12 13 NAME IOUT2 DB15 (MSB) (DB7.