HM51W17805

HM51W17805 Series 16 M EDO DRAM (2-Mword × 8-bit) 2 k Refresh EO Description Features E0155H10 (Ver. 1.0) (Previous ADE-203-631D (Z)) Jun. 27, 2001 The HM51W 17805 is a C MOS dynamic R AM orga nized 2, 097,152-w ord × 8-bit. It employs the most adva nce d C MOS tec hnology for high per forma nce and low powe r. The HM51W 17805 off ers Extende d Da ta Out (ED O) P age Mode as a high spee d ac ce ss mode. Multiplexe d addr ess input per mits the HM51W 17805 to be packaged in standard 28-pin plastic SOJ and 28-pin TSOP. Single 3.3 V (±0.3 V) Access time: 50 ns/60 ns/70 ns (max) Power dissipation  Active mode: 396 mW/360 mW/324 mW (max)  Standby mode : 7.2 mW (max) : 0.54 mW (max) (L-version) EDO page mode capability Long refresh period  2048 refresh cycles : 32 ms : 128 ms (L-version) 4 variations of refresh  RAS -only refresh  CAS -before-RAS refresh  Hidden refresh  Self refresh (L-version) Battery backup operation (L-version) Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd. LP ro du ct HM51W17805 Series Ordering Information Type No. Access time 50 ns 60 ns 70 ns 50 ns 60 ns 70 ns 50 ns 60 ns 70 ns 50 ns 60 ns 70 ns 50 ns 60 ns 70 ns 50 ns 60 ns 70 ns 50 ns 60 ns 70 ns 50 ns 60 ns 70 ns 300-mil 28-pin plastic TSOP II (TTP-28DB) 400-mil 28-pin plastic TSOP II (TTP-28DA) 300-mil 28-pin plastic SOJ (CP-28DNA) Package 400-mil 28-pin plastic SOJ (CP-28DA) HM51W17805J-5 HM51W17805J-6 HM51W17805J-7 EO HM51W17805LJ-...