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m INTEGRATED CIRCUIT SILICON GATE CMOS o TENTATIVE TOSHIBA MOS DIGITAL .c U × 16 BIT) CMOS NAND E2PROM 2 GBIT (256M × 8 BIT/128M 4 t DESCRIPTION e e h S a at .D w w
FEATURES
Organization Memory cell array Register Page size Block size TC58NVG1S3B 2112 × 128K × 8 2112 × 8 2112 bytes (128K + 4K) bytes TC58NVG1S8B 1056 × 128K × 16 1056 × 16 1056 words ...
