DatasheetsPDF.com

ADC. AD7440 Datasheet

DatasheetsPDF.com

ADC. AD7440 Datasheet






AD7440 ADC. Datasheet pdf. Equivalent




AD7440 ADC. Datasheet pdf. Equivalent





Part

AD7440

Description

ADC



Feature


PRELIMINARY TECHNICAL DATA a Preliminar y Technical Data FEATURES Fast Throughp ut Rate: 1MSPS Specified for VDD of 3 V and 5 V Low Power at max Throughput Ra te: 3.75 mW typ at 1MSPS with 3 V Suppl ies 9 mW typ at 1MSPS with 5 V Supplies Fully Differential Analog Input Wide I nput Bandwidth: 70dB SINAD at 200kHz In put Frequency Flexible Power/Serial Clo ck Speed Managemen.
Manufacture

Analog Devices

Datasheet
Download AD7440 Datasheet


Analog Devices AD7440

AD7440; t No Pipeline Delays High Speed Serial I nterface - SPI TM /QSPI TM / MICROWIRE T M / DSP Compatible Power-Down Mode: 1 µA max 8 Lead SOT-23 and MSOP Packages APPLICATIONS Transducer Interface Batt ery Powered Systems Data Acquisition Sy stems Portable Instrumentation Motor Co ntrol Communications GENERAL DESCRIPTIO N Differential Input, 1MSPS, 12- & 10- Bit ADCs in 8-lead .


Analog Devices AD7440

SOT-23 AD7450A/AD7440 FUNCTIONAL BLOCK D IAGRAM VDD VIN+ VINVREF T/H 12-BIT S UCCESSIVE APPROXIMATION ADC SCLK AD74 50A/ AD7440 CONTROL LOGIC SDATA +5 G ND The AD7450A/AD7440 are respectively 12- and 10-bit, high speed, low power, successive-approximation (SAR) analog- to-digital converters that feature a fu lly differential analog input. These pa rts operate from a.


Analog Devices AD7440

single 3 V or 5 V power supply and feat ure throughput rates up to 1MSPS. The p arts contains a low-noise, wide bandwid th, differential track and hold amplifi er (T/H) which can handle input frequen cies in excess of 1MHz with the -3dB po int being 20MHz typically. The referenc e voltage is applied externally to the VREF pin and can be varied from 100 mV to 3.5 V depending.

Part

AD7440

Description

ADC



Feature


PRELIMINARY TECHNICAL DATA a Preliminar y Technical Data FEATURES Fast Throughp ut Rate: 1MSPS Specified for VDD of 3 V and 5 V Low Power at max Throughput Ra te: 3.75 mW typ at 1MSPS with 3 V Suppl ies 9 mW typ at 1MSPS with 5 V Supplies Fully Differential Analog Input Wide I nput Bandwidth: 70dB SINAD at 200kHz In put Frequency Flexible Power/Serial Clo ck Speed Managemen.
Manufacture

Analog Devices

Datasheet
Download AD7440 Datasheet




 AD7440
Data Sheet
Differential Input, 1 MSPS
10-Bit and 12-Bit ADCs in an 8-Lead SOT-23
AD7440/AD7450A
FEATURES
Fast throughput rate: 1 MSPS
Specified for VDD of 3 V and 5 V
Low power at max throughput rate
4 mW max at 1 MSPS with 3 V supplies
9.25 mW max at 1 MSPS with 5 V supplies
Fully differential analog input
Wide input bandwidth
70 dB SINAD at 100 kHz input frequency
Flexible power/serial clock speed management
No pipeline delays
High speed serial interface
SPI/QSPI™/MICROWIRE™/DSP compatible
Power-down mode: 1 μA max
8-lead SOT-23 and MSOP packages
APPLICATIONS
Transducer interface
Battery-powered systems
Data acquisition systems
Portable instrumentation
Motor control
GENERAL DESCRIPTION
The AD7440/AD7450A1 are 10-bit and 12-bit high speed, low
power, successive approximation (SAR) analog-to-digital
converters with a fully differential analog input. These parts
operate from a single 3 V or 5 V power supply and use
advanced design techniques to achieve very low power
dissipation at throughput rates up to 1 MSPS. The SAR
architecture of these parts ensures that there are no pipeline
delays.
The parts contain a low noise, wide bandwidth, differential
track-and-hold amplifier (T/H) that can handle input
frequencies up to 3.5 MHz. The reference voltage is applied
externally to the VREF pin and can be varied from 100 mV to
3.5 V depending on the power supply and what suits the
application. The value of the reference voltage determines the
common-mode voltage range of the part. With this truly
differential input structure and variable reference input, the
user can select a variety of input ranges and bias points.
The conversion process and data acquisition are controlled
using CS and the serial clock, allowing the device to interface
with microprocessors or DSPs. The input signals are sampled
1 Protected by U.S. Patent Number 6,681,332.
Rev. D
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
FUNCTIONAL BLOCK DIAGRAM
VDD
VIN+
VIN–
VREF
12-BIT
T/H SUCCESSIVE
APPROXIMATION
ADC
AD7440/AD7450A CONTROL LOGIC
SCLK
SDATA
CS
GND
Figure 1.
on the falling edge of CS; the conversion is also initiated at this
point. The SAR architecture of these parts ensures that there are
no pipeline delays. The AD7440 and the AD7450A use advanced
design techniques to achieve very low power dissipation at high
throughput rates.
PRODUCT HIGHLIGHTS
1. Operation with either 3 V or 5 V power supplies.
2. High throughput with low power consumption.
With a 3 V supply, the AD7440/AD7450A offer 4 mW
max power consumption for 1 MSPS throughput.
3. Fully differential analog input.
4. Flexible power/serial clock speed management.
The conversion rate is determined by the serial clock,
allowing the power to be reduced as the conversion time
is reduced through the serial clock speed increase. These
parts also feature a shutdown mode to maximize power
efficiency at lower throughput rates.
5. Variable voltage reference input.
6. No pipeline delay.
7. Accurate control of the sampling instant via a CS input and
once-off conversion control.
8. ENOB > eight bits typically with 100 mV reference.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2003–2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com




 AD7440
AD7440/AD7450A
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
AD7440–Specifications.................................................................... 3
AD7450A–Specifications................................................................. 5
Timing Specifications....................................................................... 7
Absolute Maximum Ratings............................................................ 8
ESD Caution.................................................................................. 8
Pin Configurations and Function Descriptions ........................... 9
Terminology .................................................................................... 10
AD7440/AD7450A–Typical Performance Characteristics ....... 12
Circuit Information ........................................................................ 15
Converter Operation.................................................................. 15
ADC Transfer Function............................................................. 15
REVISION HISTORY
7/15—Rev. C to Rev. D
Changed FSCLK to fSCLK.................................................... Throughout
Changes to Figure 34...................................................................... 18
Changes to Power vs. Throughput Rate Section ........................ 24
Deleted Microprocessor and DSP Interfacing Section,
AD7440/AD7450A to ADSP-21xx Section, Table 7, and Figure
45; Renumbered Sequentially ....................................................... 25
Deleted AD7440/AD7450A to TMS320C5x/C54x Section,
Figure 46, AD7440/AD7450A to DSP56xxx Section, and
Figure 47 .......................................................................................... 26
Updated Outline Dimensions ....................................................... 27
Changes to Ordering Guide .......................................................... 28
9/05—Rev. B to Rev. C
Changes to Ordering Guide .......................................................... 28
Data Sheet
Typical Connection Diagram ................................................... 16
Analog Input ............................................................................... 16
Driving Differential Inputs ....................................................... 18
Digital Inputs .............................................................................. 19
Reference ..................................................................................... 19
Single-Ended Operation............................................................ 20
Serial Interface ............................................................................ 21
Modes of Operation ....................................................................... 23
Normal Mode.............................................................................. 23
Power-Down Mode.................................................................... 23
Power-Up Time .......................................................................... 24
Power vs. Throughput Rate....................................................... 24
Grounding and Layout Hints.................................................... 25
Evaluating the AD7440/AD7450A Performance................... 25
Outline Dimensions ....................................................................... 26
Ordering Guide .......................................................................... 27
2/04—Rev. A to Rev. B
Added Patent Note ............................................................................1
1/04—Rev. 0 to Rev. A
Updated Format..................................................................Universal
Changes to General Description .....................................................1
Changes to Table 1 Footnotes ..........................................................3
Changes to Table 2 Footnotes ..........................................................5
Changes to Table 3 Footnotes ..........................................................7
8/03—Revision 0: Initial Version
Rev. D | Page 2 of 27




 AD7440
Data Sheet
AD7440/AD7450A
AD7440–SPECIFICATIONS
Table 1. VDD = 2.7 V to 3.6 V, fSCLK = 18 MHz, fS = 1 MSPS, VREF = 2.0 V; VDD = 4.75 V to 5.25 V, fSCLK = 18 MHz, fS = 1 MSPS,
VREF = 2.5 V; VCM1 = VREF; TA = TMIN to TMAX, unless otherwise noted. Temperature range for B Version: –40°C to +85°C.
Parameter
Test Conditions/Comments
B Version
Unit
DYNAMIC PERFORMANCE
Signal-to-(Noise + Distortion) (SINAD)2
fIN = 100 kHz
61 dB min
Total Harmonic Distortion (THD)2
–82 dB typ
–74 dB max
Peak Harmonic or Spurious Noise2
–82 dB typ
–76 dB max
Intermodulation Distortion (IMD)2
fa = 90 kHz, fb = 110 kHz
Second-Order Terms
–83 dB typ
Third-Order Terms
–83 dB typ
Aperture Delay2
5 ns typ
Aperture Jitter2
50 ps typ
Full Power Bandwidth2, 3
@ –3 dB
20 MHz typ
@ –0.1 dB
2.5 MHz typ
DC ACCURACY
Resolution
10 Bits
Integral Nonlinearity (INL)2
±0.5 LSB max
Differential Nonlinearity (DNL)2
Guaranteed no missed codes to 10 bits
±0.5
LSB max
Zero-Code Error2
±2.5 LSB max
Positive Gain Error2
±1 LSB max
Negative Gain Error2
±1 LSB max
ANALOG INPUT
Full-Scale Input Span
2 × VREF4
VIN+ – VIN–
V
Absolute Input Voltage
VIN+
VCM = VREF
VCM ± VREF/2
V
VIN– VCM = VREF
VCM ± VREF/2
V
DC Leakage Current
±1 μA max
Input Capacitance
When in track-and-hold
30/10
pF typ
REFERENCE INPUT
VREF Input Voltage
VDD = 4.75 V to 5.25 V (±1% tolerance for
specified performance)
2.55
V
VDD = 2.7 V to 3.6 V (±1% tolerance for specified
performance)
2.06
V
DC Leakage Current
± 1 μA max
VREF Input Capacitance
When in track-and-hold
10/30
pF typ
LOGIC INPUTS
Input High Voltage, VINH
2.4 V min
Input Low Voltage, VINL
0.8 V max
Input Current, IIN
Input Capacitance, CIN7
Typically 10 nA, VIN = 0 V or VDD
±1
10
μA max
pF max
LOGIC OUTPUTS
Output High Voltage, VOH
VDD = 4.75 V to 5.25 V; ISOURCE = 200 μA
2.8
V min
VDD = 2.7 V to 3.6 V; ISOURCE = 200 μA
2.4
V min
Output Low Voltage, VOL
ISINK = 200 μA
0.4 V max
Floating-State Leakage Current
±1 μA max
Floating-State Output Capacitance7
10 pF max
Output Coding
Twos complement
Rev. D | Page 3 of 27






Recommended third-party AD7440 Datasheet






@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)