Document
PG 240128-A
OUTLINE DIMENSION & BLOCK DIAGRAM
72.0 8.0 128.0 114.0 107.95 4- 3.0 PAD4- 7.0 H1 H2
4- 1.0 57.55
74.0 64.0
240 x 128 Dots
K 2.0
Negative Voltage Generator BACKLIGHT
A K
The tolerance unless classified
144.0 x 104.0 114.0 x 64.0 0.40 x 0.40 0.45 x 0.45
0.3mm
MECHANICAL SPECIFICATION
Overall Size View Area Dot Size Dot Pitch
Module W /O B/L EL B/L LED / CCFL B/L
H2 / H1 5.2 / 9.8 5.2 / 9.8 9.2 / 13.8
PIN ASSIGNMENT
Pin no. 1 2 3 4 5 6 7-14 15 16 17 18 19 20 Symbol Vss Vdd Vo
ABSOLUTE MAXIMUM RATING
Min. -0.3 0 -0.3
Function Power supply(GND) Power supply(+) Contrast Adjust Command / data select C/D Data read RD Data write WR Data bus line DB0-DB7 Chip enable CE Reset RST Negative output Vee MD2 Select number of columns FS1 Font selection No connection NC
Symbol Condition Vdd-Vss 25oC 25oC LCD driving supply voltage Vdd-Vee Input voltage 25oC Vin Item
Supply for logic voltage
Max. Units V 7.0 22.0 V Vdd+0.3 V
ELECTRICAL CHARACTERISTICS
Item Symbol Condition Min. Typical Max. Units 25oC 4.5 V Power supply voltage Vdd-Vss 5.5 Top N W N W N W V 18.8 19.8 20.8 -20oC V LCD operation voltage Vop
0oC
12.5 13.1 13.7
LCM current consumption (No B/L)
Idd
Backlight current consumption
LED/edge VB/L=3.5V
LED/array VB/L=4.2V
LCD option: STN, TN, FSTN Backlight Option: LED,EL Backlight feature, other Specs not available on catalog is under request.
m o .c U 4 t e e h S a at .D w w w
25oC
11.7 17.2 12.3 18.1 12.9 19.1 10.9 11.4 11.9
0.05 0.4
17.7
DB0~DB7 WR RD CE C D RESET FS1 MD2 Vdd Vss Vo Vee
m o .c U 4 t e e h S a t a .D w w w
55.0 18.0 20 1 1.8 13.74 3.0 20- 1.0 P2.54 x 19=48.26 2.5 45.0 138.0 44.0 0.5 COM
8 5 3 64 2
20.0 97.0 104 0.5
A
LCD PANEL
80
COM
64
T6963C
13 8
80
80
3.5
1.6
0.4
SRAM
COL
4
COL
4
COL
4
0.05
2
4
CRYSTAL
50oC
70oC
16.1
16.9
Vdd=5V
35
50
120
900
V V V V mA mA mA
.