8M-Bit CMOS Mask ROM
K3N4C1000D-TC(E)
8M-Bit (1Mx8 /512Kx16) CMOS MASK ROM
FEATURES
• Switchable organization 1,048,5762 x 8(byte mode) 524,2...
Description
K3N4C1000D-TC(E)
8M-Bit (1Mx8 /512Kx16) CMOS MASK ROM
FEATURES
Switchable organization 1,048,5762 x 8(byte mode) 524,288 x 16(word mode) Fast access time : 100ns(Max.) Supply voltage : single +5V Current consumption Operating : 50mA(Max.) Standby : 50µA(Max.) Fully static operation All inputs and outputs TTL compatible Three state outputs Package -. K3N4C1000D-TC(E) : 44-TSOP2-400
CMOS MASK ROM
GENERAL DESCRIPTION
The K3N4C1000D-TC(E) is a fully static mask programmable ROM fabricated using silicon gate CMOS process technology, and is organized either as 1,048,576 x8 bit(byte mode) or as 524,288 x16 bit(word mode) depending on BHE voltage level.(See mode selection table) This device operates with a 5V single power supply, and all inputs and outputs are TTL compatible. Because of its asynchronous operation, it requires no external clock assuring extremely easy operation. It is suitable for use in program memory of microprocessor, and data memory, character generator. The K3N4C1000D-TC(E) is packaged in a 44-TSOP2.
FUNCTIONAL BLOCK DIAGRAM
PRODUCT INFORMATION
Product K3N4C1000D-TC K3N4C1000D-TE Operating Temp Range 0°C~70°C -20°C~85°C Vcc Range (Typical) 5.0V Speed (ns) 100
A18 . . . . . . . . A0 A-1
X BUFFERS AND DECODER
MEMORY CELL MATRIX (524,288x16/ 1,048,576x8)
Y BUFFERS AND DECODER
SENSE AMP. DATA OUT BUFFERS
PIN CONFIGURATION
N.C A18 A17 A7 A6 A5 A4 A3
1 2 3 4 5 6 7 8
44 N.C 43 N.C 42 A8 41 A9 40 A10 39 A11 38 A12 37 A13 36 A14 35 A15 34 A16 ...
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