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MC33897D Dataheets PDF



Part Number MC33897D
Manufacturers Motorola
Logo Motorola
Description Single Wire CAN Transceiver
Datasheet MC33897D DatasheetMC33897D Datasheet (PDF)

Freescale Semiconductor Technical Data Document order number: MC33897 Rev 11.0, 12/2005 Single Wire CAN Transceiver The 33897 Series provides a physical layer for digital communications purposes using a Carrier Sense Multiple Access/ Collision Resolution (CSMA/CR) data link operating over a single wire medium. This is more commonly referred to as Single Wire Controller Area Network (CAN). The 33897 Series operates directly from a vehicle's 12 V battery system or a broad range of DC-power sour.

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Freescale Semiconductor Technical Data Document order number: MC33897 Rev 11.0, 12/2005 Single Wire CAN Transceiver The 33897 Series provides a physical layer for digital communications purposes using a Carrier Sense Multiple Access/ Collision Resolution (CSMA/CR) data link operating over a single wire medium. This is more commonly referred to as Single Wire Controller Area Network (CAN). The 33897 Series operates directly from a vehicle's 12 V battery system or a broad range of DC-power sources. It can operate at either low or high (33.33 kbps or 83.33 kbps) data rates. A highvoltage wake-up feature allows the device to control the regulator used in support of the MCU and other logic. The device includes a control terminal that can be used to put the module regulator into Sleep mode. The presence of a defined wake-up voltage level on the bus will reactivate the control line to turn the regulator and the system back on. The device complies with the GMW3089v2.4 General Motors Corporation specification. Features • • • • • • • • Waveshaping for Low Electromagnetic Interference (EMI) Detects and Automatically Handles Loss of Ground Worst-Case Sleep Mode Current of Only 60 µA Current Limit Prevents Damage Due to Bus Shorts Built-In Thermal Shutdown on Bus Output Protected Against Vehicular Electrical Transients Undervoltage Lockout Prevents False Data with Low Battery Pb-Free Packaging Designated by Suffix Code EF 33897/A/B/C/D SINGLE WIRE CAN TRANSCEIVER D SUFFIX EF (Pb-FREE) SUFFIX 98ASB42565B 14-TERMINAL SOICN EF (Pb-FREE) SUFFIX 98ASB42564B 8-TERMINAL SOICN ORDERING INFORMATION Device MC33897D/R2 MC33897EF/R2 MC33897AD/R2 MC33897AEF/R2 *MC/PC33897CEF/R2 MC33897BEF/R2 *MC/PC33897DEF/R2 * Recommended device for all new designs Temperature Range (TA) Package 14 SOICN - 40°C to 125°C 8 SOICN Power Source VCC Voltage Regulator EN Battery VBATT VCC CNTL TXD RXD MCU MODE0 MODE1 GND 4 BUS LOAD SWC BUS 33897/A/C Figure 1. 33897/A/C Simplified Application Diagram * This document contains certain information on a new product. Specifications and information herein are subject to change without notice. www.DataSheet4U.com © Freescale Semiconductor, Inc., 2005. All rights reserved. www.DataSheet4U.com www.DataSheet4U.com DEVICE VARIATIONS VCC Battery VCC TXD RXD MCU VBATT BUS LOAD SWC BUS MODE0 MODE1 GND 33897B/D Figure 2. 33897B/D Simplified Application Diagram DEVICE VARIATIONS Table 1. Device Variations Part No. 33897 33897A Load Voltage Sleep Mode 1.0 V Max 0.1 V Max • • • • 33897B 0.1 V Max • • • • *33897C 0.1 V Max • • • *33897D 0.1 V Max • • • • Other Significant Differences 14-Terminal Package 14-Terminal Package Removes diode drop during Sleep Mode May not detect Loss of Ground under certain module characteristics. 8-Terminal Package Removes diode drop during Sleep Mode Does not include the CNTL terminal May not detect Loss of Ground under certain module characteristics. 14-Terminal Package Removes diode drop during Sleep Mode Effectively detects Loss of Ground 8-Terminal Package Removes diode drop during Sleep Mode Effectively detects Loss of Ground Does not include the CNTL terminal 2, 3, 4, 6, 7 10,12, 14 7 2, 3, 4, 6, 7 10,12, 14 See Page 7 7 *Recommended device for all new designs 33897/A/B/C/D 2 Analog Integrated Circuit Device Data Freescale Semiconductor INTERNAL BLOCK DIAGRAM INTERNAL BLOCK DIAGRAM TXD BUS DRVR TX Bus DRVR MODE0 MODE1 HV WU E n HVWU Enable Mode Mode Co ntrol Control Wa ve Sha ping E n Waveshaping Enable TX Dat Data a TXD Disab le Disable BUS Bus BUSRCVR RCVR HV WU De t HVWU Detect RX Dat a Disab le RXD Data Disable TXD RXD Undervoltage Detect Timer OSC Load Switch VBATT BAT Timers LOAD GND CNTL CNTL* *CNTL terminal is present on 33897/A/C only. Figure 3. 33897/A/B/C/D Simplified Internal Block Diagram 33897/A/B/C/D Analog Integrated Circuit Device Data Freescale Semiconductor 3 TERMINAL CONNECTIONS TERMINAL CONNECTIONS 33897/A/C GND TXD MODE0 MODE1 RXD NC GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 GND NC BUS LOAD VBATT CNTL GND TXD MODE0 MODE1 RXD 1 1 2 2 3 3 4 4 33897B/D 88 77 66 55 GND BUS LOAD VBATT Figure 4. 33897/A/B/C/D Terminal Connections Table 2. Terminal Definitions A functional description of each terminal can be found in the Functional Terminal Description section, begining on page 12. 33897/A/C Terminal 1, 7, 8, 14 2 3, 4 5 6, 13 33897B/D Terminal 8 1 2, 3 4 – Terminal Name GND TXD MODE0, MODE1 RXD NC Formal Name Ground Transmit Data Mode Control Receive Data No Connect Definition Electrical Common Ground and Heat removal. A good thermal path will also reduce the die temperature. Data input here will appear on the BUS terminal. A logic [0] will assert the bus, a logic [1] will make the bus go to the recessive state. These terminals control Sleep Mode, Transmit Level, and Speed. They have weak pulldowns. Open drain output of the data on BUS. A recessive bus = a logic [1], a dominant bus = logic [0]. An external pullup i.


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