(MB84VD2228xEA/EE / MB84VD2229xEA/EE) 32M (X 8/X16) FLASH MEMORY & 8M (X 8/X16) STATIC RAM
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FUJITSU SEMICONDUCTOR DATA SHEET
DS05-50207-1E
Stacked MCP (Multi-Chip Package) F...
Description
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FUJITSU SEMICONDUCTOR DATA SHEET
DS05-50207-1E
Stacked MCP (Multi-Chip Package) FLASH MEMORY & SRAM
CMOS
32M (× 8/×16) FLASH MEMORY & 8M (× 8/×16) STATIC RAM
MB84VD2228XEA-90/MB84VD2229XEA-90 MB84VD2228XEE-90/MB84VD2229XEE-90
s FEATURES
Power supply voltage of 2.7 V to 3.3 V High performance 90 ns maximum access time (Flash) 70 ns maximum access time (SRAM) Operating Temperature –25°C to +85°C Package 71-ball BGA
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s PRODUCT LINE UP
Flash Memory Ordering Part No. VCCf, VCCs= 3.0V
+0.3 V –0.3 V
SRAM
MB84VD2228XEA/EE-90/MB84VD2229XEA/EE-90 90 90 40 70 70 35
Max. Address Access Time (ns) Max. CE Access Time (ns) Max. OE Access Time (ns)
s PACKAGE
71-ball plastic FBGA
(BGA-71P-M01)
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MB84VD2228XEA/EE/2229XEA/EE-90
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1.FLASH MEMORY Simultaneous Read/Write operations (dual bank) Multiple devices available with different bank sizes Host system can program or erase in one bank, then immediately and simultaneously read from the other bank Zero latency between read and write operations Read-while-erase Read-while-program Minimum 100,000 write/erase cycles Sector erase architecture Eight 4 K words and sixty three 32 K words. Any combination of sectors can be concurrently erased. Also supports full chip erase. Boot Code Sector Architecture MB84VD2228X: Top sector MB84VD2229X: Bottom sector Embedded EraseTM Algorithms Automatically pre-programs and erases the chip ...
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