MB84VD2003

( DataSheet : www.DataSheet4U.com ) FUJITSU SEMICONDUCTOR DATA SHEET DS05-50110-1E MCP (Multi-Chip Package) FLASH MEMORY & SRAM CMOS 8M (× 8/× 16) FLASH MEMORY & 2M (× 8) STATIC RAM MB84VD2002-10/MB84VD2003-10 s FEATURES Power supply voltage of 2.7 to 3.6 V High performance 100 ns maximum access time Operating Temperature –20 to +85°C — FLASH MEMORY Simultaneous operations Read-while Erase or Read-while-Program Minimum 100,000 write/erase cycles Sector erase architecture Two 16 K byte, four 8 K bytes, two 32 K byte, and fourteen 64 K bytes. Any combination of sectors can be concurrently erased. Also supports full chip erase. Boot Code Sector Architecture MB84VD2002: Top sector MB84VD2003: Bottom sector Embedded EraseTM Algorithms Automatically pre-programs and erases the chip or any sector Embedded ProgramTM Algorithms Automatically writes and verifies data at specified address Data Polling and Toggle Bit feature for detection of program or erase cycle completion Ready-Busy output (RY/BY) Hardware method for detection of program or erase cycle completion Automatic sleep mode When addresses remain stable, automatically switch themselves to low power mode. Low VCC write inhibit ≤ 2.5 V Erase Suspend/Resume Suspends the erase operation to allow a read in another sector within the same device Please refer to "MBM29DL800TA/BA" data sheet in detailed function — SRAM Power dissipation Operating : 35 mA max. Standby : 50 µA max. Power down featur...