STATIC RAM. MB84VD2108x Datasheet

MB84VD2108x RAM. Datasheet pdf. Equivalent

Part MB84VD2108x
Description (MB84VD2108x / MB84VD2109x) 16M (x8/x16) FLASH MEMORY & 2M (x8/x16) STATIC RAM
Feature ( DataSheet : www.DataSheet4U.com ) FUJITSU SEMICONDUCTOR DATA SHEET DS05-50201-3E Stacked MCP (M.
Manufacture Fujitsu Media Devices
Datasheet
Download MB84VD2108x Datasheet

( DataSheet : www.DataSheet4U.com ) FUJITSU SEMICONDUCTOR D MB84VD2108x Datasheet
Recommendation Recommendation Datasheet MB84VD2108x Datasheet




MB84VD2108x
( DataSheet : www.DataSheet4U.com )
FUJITSU SEMICONDUCTOR
DATA SHEET
DS05-50201-3E
Stacked MCP (Multi-Chip Package) FLASH MEMORY & SRAM
CMOS
16M (×8/×16) FLASH MEMORY &
2M (×8/×16) STATIC RAM
MB84VD2108X-85/MB84VD2109X-85
s FEATURES
Power supply voltage of 2.7 V to 3.6 V
High performance
85 ns maximum access time
Operating Temperature
25 °C to +85 °C
Package 61-ball FBGA, 56-pin TSOP(I)
(Continued)
s PRODUCT LINE UP
Ordering Part No.
VCCf*,
VCCs*
=
3.0
V
+0.6
0.3
V
V
Max. Address Access Time (ns)
Flash Memory
SRAM
MB84VD2108X-85/MB84VD2109X-85
85 85
Max. CE Access Time (ns)
85 85
Max. OE Access Time (ns)
35 45
*: Both VCCf and VCCs must be in recommended operation range when either part is being accessed.
s PACKAGES
61-ball plastic FBGA
56-pin plastic TSOP(I)
(BGA-61P-M02)
www.DataSheet4U.com
(FPT-56P-M04)
www.DataSheet4U.com



MB84VD2108x
MB84VD2108X-85/MB84VD2109X-85
(Continued)
1. FLASH MEMORY
Simultaneous Read/Write operations (dual bank)
Multiple devices available with different bank sizes
Host system can program or erase in one bank, then immediately and simultaneously read from the other bank
Zero latency between read and write operations.
Read-while-erase
Read-while-program
Minimum 100,000 write/erase cycles
Sector erase architecture
Eight 4 K words and thirty one 32 K words.
Any combination of sectors can be concurrently erased. Also supports full chip erase.
Boot Code Sector Architecture
MB84VD2108X : Top sector
MB84VD2109X : Bottom sector
Embedded EraseTM* Algorithms
Automatically pre-programs and erases the chip or any sector
Embedded ProgramTM* Algorithms
Automatically writes and verifies data at specified address
Data Polling and Toggle Bit feature for detection of program or erase cycle completion
Ready-Busy output (RY/BY)
Hardware method for detection of program or erase cycle completion
Automatic sleep mode
When addresses remain stable, automatically switch themselves to low power mode.
Low VCCf write inhibit 2.5 V
Hidden ROM (Hi-ROM) region
64K byte of Hi-ROM, accessible through a new “Hi-ROM Enable” command sequence
Factory serialized and protected to provide a secure electronic serial number (ESN)
WP/ACC input pin
At VIL, allows protection of boot sectors, regardless of sector protection/unprotection status
(MB84VD2108X : SA37, SA38 MB84VD2109X : SA0, SA1)
At VIH, allows removal of boot sector protection
At VACC, program time will reduce by 40%.
Erase Suspend/Resume
Suspends the erase operation to allow a read in another sector within the same device.
Please refer to “MBM29DL16XTD/BD” data sheet in detailed function
2. SRAM
Power dissipation
Operating: 50 mA Max.
Standby: 7 µA Max.
Power down features using CE1s and CE2s
• Data retention supply voltage : 1.5 V to 3.6 V
CE1s and CE2s Chip Select
• Byte data control : LBs (DQ0 to DQ7) , UBs (DQ8 to DQ15)
*: Embedded EraseTM and Embedded ProgramTM are trademarks of Advanced Micro Devices, Inc.
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