MB84VD2208xEA

( DataSheet : www.DataSheet4U.com ) FUJITSU SEMICONDUCTOR DATA SHEET DS05-50205-1E Stacked MCP (Multi-Chip Package) FLASH MEMORY & SRAM CMOS 32M (× 8/×16) FLASH MEMORY & 2M (× 8/×16) STATIC RAM MB84VD2208XEA-90/MB84VD2209XEA-90 s FEATURES Power supply voltage of 2.7 to 3.3V High performance 90 ns maximum access time (Flash) 85 ns maximum access time (SRAM) Operating Temperature –25 to +85°C Package 73-ball FBGA (Continued) s PRODUCT LINE UP Flash Memory Ordering Part No. VCCf, VCCs = 3.0 V +0.3 V –0.3 V SRAM MB84VD2208XEA-90/MB84VD2209XEA-90 90 90 40 85 85 45 Max. Address Access Time (ns) Max. CE Access Time (ns) Max. OE Access Time (ns) s PACKAGE 73-ball plastic FBGA ( BGA-73P-M01) www.DataSheet4U.com www.DataSheet4U.com MB84VD2208XEA-90/MB84VD2209XEA-90 (Continued) 1. FLASH MEMORY Simultaneous Read/Write operations (dual bank) Multiple devices available with different bank sizes Host system can program or erase in one bank, then immediately and simultaneously read from the other bank Zero latency between read and write operations Read-while-erase Read-while-program Minimum 100,000 write/erase cycles Sector erase architecture Eight 4 K words and sixty three 32 K words. Any combination of sectors can be concurrently erased. Also supports full chip erase. Boot Code Sector Architecture MB84VD2208XEA: Top sector MB84VD2209XEA: Bottom sector Embedded EraseTM Algorithms Automatically pre-programs and erases the chip or any sector Embedded Program...