2-INPUT MULTIPLEXER. MC74AC257 Datasheet

MC74AC257 MULTIPLEXER. Datasheet pdf. Equivalent

Part MC74AC257
Description QUAD 2-INPUT MULTIPLEXER
Feature MC74AC257, MC74ACT257 Quad 2-Input Multiplexer with 3-State Outputs The MC74AC257/74ACT257 is a qua.
Manufacture ON Semiconductor
Datasheet
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MC74AC257, MC74ACT257 Quad 2-Input Multiplexer with 3-State MC74AC257 Datasheet
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MC74AC257
MC74AC257, MC74ACT257
Quad 2-Input Multiplexer
with 3-State Outputs
The MC74AC257/74ACT257 is a quad 2−input multiplexer with
3−state outputs. Four bits of data from two sources can be selected
using a Common Data Select input. The four outputs present the
selected data in true (noninverted) form. The outputs may be switched
to a high impedance state by placing a logic HIGH on the common
Output Enable (OE) input, allowing the outputs to interface directly
with bus−oriented systems.
Multiplexer Expansion by Tying Outputs Together
Noninverting 3−State Outputs
Outputs Source/Sink 24 mA
ACT257 Has TTL Compatible Inputs
These are Pb−Free Devices
VCC OE I0c I1c Zc I0d I1d Zd
16 15 14 13 12 11 10 9
12345678
S I0a I1a Za I0b I1b Zb GND
Figure 1. Pinout: 16−Lead Packages Conductors
(Top View)
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16
1
16
1
MARKING
DIAGRAMS
16
SOIC−16
D SUFFIX
CASE 751B
1
xxx257G
AWLYWW
TSSOP−16
DT SUFFIX
CASE 948F
16
xxx
257
ALYWG
G
1
xxx = AC or ACT
A = Assembly Location
WL or L = Wafer Lot
Y = Year
WW or W = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
March, 2015 − Rev. 8
1
Publication Order Number:
MC74AC257/D



MC74AC257
MC74AC257, MC74ACT257
PIN NAME
PIN
S
OE
I0a−I0d
I1a−I1d
Za−Zd
FUNCTION
Common Data Select Input
3−State Output Enable Input
Data Inputs from Source 0
Data Inputs from Source 1
3−State Multiplexer Outputs
TRUTH TABLE
Output
Enable
Select
Input
OE S
HX
LH
LH
LL
LL
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Data
Inputs
I0 I1
XX
XL
XH
LX
HX
Outputs
Z
Z
L
H
L
H
OE I0a I1a I0b I1b I0c I1c I0d I1d
S
Za Zb Zc Zd
FUNCTIONAL DESCRIPTION
The MC74AC257/74ACT257 is a quad 2−input
multiplexer with 3−state outputs. It selects four bits of data
from two sources under control of a Common Data Select
input. When the Select input is LOW, the I0x inputs are
selected and when Select is HIGH, the I1x inputs are
selected. The data on the selected inputs appears at the
outputs in true (noninverted) form. The device is the logic
implementation of a 4−pole, 2−position switch where the
position of the switch is determined by the logic levels
supplied to the Select input. The logic equations for the
outputs are shown below:
Za = OE(I1aS+I0aS)
Zb = OE(I1bS+I0bS)
Zc = OE(I1cS+I0cS)
Zd = OE(I1dS+I0dS)
When the Output Enable input (OE) is HIGH, the outputs
are forced to a high impedance state. If the outputs are tied
together, all but one device must be in the high impedance
state to avoid high currents that would exceed the maximum
ratings. Designers should ensure the Output Enable signals
to 3−state devices whose outputs are tied together are
designed so there is no overlap.
Figure 2. Logic Symbol
OE I0a
I1a
I0b
I1b I0c
I1c I0d I1d S
NOTE:
Za Zb Zc Zd
This diagram is provided only for the understanding of logic operations
and should not be used to estimate propagation delays.
Figure 3. Logic Diagram
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