ADDRESSABLE LATCH. MC74ACT259 Datasheet

MC74ACT259 LATCH. Datasheet pdf. Equivalent

Part MC74ACT259
Description 8-BIT ADDRESSABLE LATCH
Feature MC74AC259, MC74ACT259 8-Bit Addressable Latch The MC74AC259/74ACT259 is a high−speed 8−bit addressa.
Manufacture ON Semiconductor
Datasheet
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MC74AC259, MC74ACT259 8-Bit Addressable Latch The MC74AC259 MC74ACT259 Datasheet
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MC74ACT259
MC74AC259, MC74ACT259
8-Bit Addressable Latch
The MC74AC259/74ACT259 is a high−speed 8−bit addressable
latch designed for general purpose storage applications in digital
systems. It is a multifunctional device capable of storing single line
data in eight addressable latches, and also a 1−of−8 decoder and
demultiplexer with active HIGH outputs. The device also incorporates
an active LOW Common Clear for resetting all latches, as well as an
active LOW Enable. It is functionally identical to the ALS259 8−bit
addressable latch.
Serial−to−Parallel Conversion
Eight Bits of Storage with Output of Each Bit Available
Random (Addressable) Data Entry
Active High Demultiplexing or Decoding Capability
Easily Expandable
Common Clear
These are Pb−Free Devices
VCC MR E D Q7 Q6 Q5 Q4
16 15 14 13 12 11 10 9
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16
1
MARKING
DIAGRAM
16
SOIC−16
D SUFFIX
CASE 751B
1
xxx259G
AWLYWW
xxx = AC or ACT
A = Assembly Location
WL = Wafer Lot
Y = Year
WW = Work Week
G = Pb−Free Package
12345678
A0 A1 A2 Q0 Q1 Q2 Q3 GND
Figure 1. Pinout: 16−Lead Packages Conductors
(Top View)
A0 E D
A1
A2 MR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
Figure 2. Logic Symbol
MODE SELECT TABLE
E MR
Mode
L H Addressable Latch
H H Memory
L L Active HIGH 8−Channel Demultiplexer
H L Clear
H = HIGH Voltage Level
L = LOW Voltage Level
© Semiconductor Components Industries, LLC, 2015
March, 2015 − Rev. 7
1
Publication Order Number:
MC74AC259/D



MC74ACT259
MC74AC259, MC74ACT259
MODE SELECT−FUNCTION TABLE
Operating
Inputs
Outputs
Mode
MR E D A0 A1 A2 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
Master Reset L H X X X X L L L L L L L L
L L d L L L Q=d L L L L L L L
L L d H L L L Q=d L L L L L L
Demultiplex L L d L H L L L Q = d L L L L L
(Active HIGH
Decoder when
D = H)
• ••••• • • • • • • • •
• ••••• • • • • • • • •
L L d H H H L L L L L L L Q=d
Store
(Do Nothing)
H H X X X X q0
q1
q2
q3
q4
q5
q6
q7
H L d L L L Q = d q1 q2 q3 q4 q5 q6 q7
H L d H L L q0 Q = d q2 q3 q4 q5 q6 q7
Addressable
Latch
H LdLHL
• •••••
q0
q1 Q = d q3
•••
q4
q5
q6
q7
• ••••• • • • • • • • •
• ••••• • • • • • • • •
H L d H H H q0 q1 q2 q3 q4 q5 q6 Q = d
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
d = HIGH or LOW Data one setup time prior to the LOW−to−HIGH Enable transition
q = Lower case letters indicate the state of the referenced output established during the last cycle in which it was addressed
or cleared.
FUNCTIONAL DESCRIPTION
The MC74AC259/74ACT259 has four modes of
operation as shown in the Mode Selection Table. In the
addressable latch mode, data on the Data line (D) is written
into the addressed latch. The addressed latch will follow the
data input with all non−addressed latches remaining in their
previous states in the memory mode. All latches remain in
their previous state and are unaffected by the Data or
Address inputs.
In the one−of−eight decoding or demultiplexing mode, the
addressed output will follow the state of the D input with all
other outputs in the LOW state. In the clear mode all outputs
are LOW and unaffected by the address and data inputs.
When operating the MC74AC/ACT259 as an addressable
latch, changing more than one bit of the address could
impose a transient wrong address. Therefore, this should
only be done while in the memory mode. The Mode Select
Function Table summarizes the operations of the
MC74AC/ACT259.
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