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TC59LM913AMB

Toshiba Semiconductor

(TC59LM905AMB / TC59LM913AMB) Network FCRAM

( DataSheet : www.DataSheet4U.com ) TC59LM913/05AMB-50,-55,-60 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON...


Toshiba Semiconductor

TC59LM913AMB

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( DataSheet : www.DataSheet4U.com ) TC59LM913/05AMB-50,-55,-60 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TM 8,388,608-WORDS × 4 BANKS × 16-BITS Network FCRAM TM 16,777,216-WORDS × 4 BANKS × 8-BITS Network FCRAM DESCRIPTION Network FCRAMTM is Double Data Rate Fast Cycle Random Access Memory. TC59LM913/05AMB is Network FCRAMTM containing 536,870,912 memory cells. TC59LM913AMB is organized as 8,388,608-words × 4 banks × 16 bits, TC59LM905AMB is organized as 16,777,216-words × 4 banks × 8 bits. TC59LM913/05AMB feature a fully synchronous operation referenced to clock edge whereby all operations are synchronized at a clock input which enables high performance and simple user interface coexistence. TC59LM913/05AMB can operate fast core cycle compared with regular DDR SDRAM. TC59LM913/05AMB is suitable for Network, Server and other applications where large memory density and low power consumption are required. The Output Driver for Network FCRAMTM is capable of high quality fast data transfer under light loading condition. FEATURES PARAMETER tCK tRC tRAC Clock Cycle Time (min) CL = 3 CL = 4 -50 5.5 ns 5.0 ns 25.0 ns 22.0 ns TBD TBD TBD TC59LM913/05 -55 6.0 ns 5.5 ns 27.5 ns 24.0 ns TBD TBD TBD -60 6.5 ns 6.0 ns 30.0 ns 26.0 ns TBD TBD TBD Random Read/Write Cycle Time (min) Random Access Time (max) IDD1S Operating Current (single bank) (max) lDD2P Power Down Current (max) lDD6 Self-Refresh Current (max) Fully Synchronous O...




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