TC59LM818DMB

( DataSheet : www.DataSheet4U.com ) TC59LM818DMB-30,-33,-40 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TM 4,194,304-WORDS × 4 BANKS × 18-BITS Network FCRAM DESCRIPTION Network FCRAMTM is Double Data Rate Fast Cycle Random Access Memory. TC59LM818DMB is Network FCRAMTM containing 301,989,888 memory cells. TC59LM818DMB is organized as 4,194,304-words × 4 banks × 18 bits. TC59LM818DMB feature a fully synchronous operation referenced to clock edge whereby all operations are synchronized at a clock input which enables high performance and simple user interface coexistence. TC59LM818DMB can operate fast core cycle compared with regular DDR SDRAM. TC59LM818DMB is suitable for Network, Server and other applications where large memory density and low power consumption are required. The Output Driver for Network FCRAMTM is capable of high quality fast data transfer under light loading condition. FEATURES PARAMETER CL = 4 tCK tRC tRAC Clock Cycle Time (min) Random Read/Write Cycle Time (min) Random Access Time (max) CL = 5 CL = 6 -30 4.0 ns 3.33 ns 3.0 ns 20.0 ns 20.0 ns 250 mA 60mA 10 mA TC59LM818DMB -33 4.5 ns 3.75 ns 3.33 ns 22.5 ns 22.5 ns 235 mA 55 mA 10 mA -40 5.0 ns 4.5 ns 4.0 ns 25 ns 25 ns 210 mA 50 mA 10 mA IDD1S Operating Current (single bank) (max) lDD2P Power Down Current (max) lDD6 Self-Refresh Current (max) Fully Synchronous Operation Double Data Rate (DDR) Data input/output are synchronized with both edge...