P8M644YL9

4'.+/+0#4; SDRAM MODULE Features: PC100 and PC133 - compatible JEDEC - Standard 168-pin , dual in-line memory module (DIMM). TSOP components. Single 3.3v +.3v power supply. Nonbuffered fully synchronous; all signals measured on positive edge of system clock. Internal pipelined operation; column address can be changed every clock cycle. Quad internal banks for hiding row access/precharge. 64ms 4096 cycle refresh. All inputs, outputs, clocks LVTTL compatible. P8M644YL9, P16M648YL9 8M, 16M x 64 DIMM PIN ASSIGNMENT (Front View) 168-PIN DIMM Options: 4 - 8Mx16 SDRAM TSOP 8 - 8Mx16 SDRAM TSOP Part Number: P8M644YL9-XX P16M648YL9-XX KEY DIMM MODULE TIMING PARAMETERS Module Component Clock CAS Latency Marking Marking Freq -100CL3A -8A 100MHZ 3 -133CL3A -75A 133MHZ 3 GENERAL DESCRIPTION The P8M644YL9 and P16M648YL9 are high performance dynamic random-access 64MB and 128MB modules respectively. These modules are organized in a x64 configuration, and utilize dual bank architecture with a synchronous interface. All signals are registered on the positive edge of the clock signals CK0 through CK3. Read and write accesses to the SDRAM are burst oriented; accesses start at a location and continue for a programmed number of locations in a sequence. Accesses begin with an ACTIVE command, which is followed by a READ or WRITE command. Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 Name Vss DQ0 D...