CY2CC1910

( DataSheet : www.DataSheet4U.com ) COMLINK™ SERIES CY2CC1910 1:10 Clock Fanout Buffer with Output Enable Features Low-voltage operation Full-range support: — 3.3V — 2.5V — 1.8V 1:10 fanout Drives either a 50-Ohm or 75-Ohm load Over voltage tolerant input hot swappable Low-input capacitance Low-output skew Low-propagation delay Typical (tpd < 4 ns) High-speed operation: — 100 MHz@1.8V — 200 MHz@2.5V/3.3V Industrial versions available Available packages include: SOIC, SSOP Description The Cypress series of network circuits are produced using advanced 0.35-micron CMOS technology, achieving the industries fastest logic and buffers. The Cypress CY2CC1910 fanout buffer features one input and ten outputs. Ideal for conversion from/to 3.3V/2.5V/1.8V. Designed for data communications clock management applications, the large fanout from a single input reduces loading on the input clock. Cypress employs unique AVCMOS-type outputs VOI™ (Variable Output Impedance) that dynamically adjust for variable impedance matching and eliminate the need for series damping resistors; they also reduce noise overall. Block Diagram 5 OE# AVCMOS 23 Pin Configuration Q1 21 Q2 19 VDD 18 Q3 Q4 16 3 ,10 15,2 2 6 IN AVCMOS Q5 1 ,12,13 1 7,24 14 GND Q10 VDD Q9 OE# IN GND GND Q8 VDD Q7 GND Q6 11 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 GND Q1 VDD Q2 GND Q3 Q4 GND Q5 VDD Q6 GND 24 pin SOIC/SSOP Q7 9 GND 4 Q8 Q9 2 Q 10 OUTPUT (AVCMOS) Pin Descr...