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Sink Drivers. A6801 Datasheet

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Sink Drivers. A6801 Datasheet






A6801 Drivers. Datasheet pdf. Equivalent




A6801 Drivers. Datasheet pdf. Equivalent





Part

A6801

Description

DABiC-5 Latched Sink Drivers



Feature


A6800 and A6801 DABiC-5 Latched Sink Dri vers Features and Benefits ▪ 3.3 to 5 V logic supply range ▪ Up to 10 MHz data input rate ▪ High-voltage, high -current outputs ▪ Darlington current -sink outputs, with improved low-satura tion voltages ▪ CMOS, TTL compatible inputs ▪ Output transient protection ▪ Internal pull-down resistors ▪ Lo w-power CMOS latches Packages A68.
Manufacture

Allegro MicroSystems

Datasheet
Download A6801 Datasheet


Allegro MicroSystems A6801

A6801; 00 14-pin 7.62 mm DIP (A package) A6800 14-pin SOICN (L package) A6801 28-pin PLCC (EP package) Approximate scale 1: 1 A6801 24-pin SOICW (LW package) Des cription The A6800 and A6801 latched-in put BiMOS ICs merge high-current, high- voltage outputs with CMOS logic. The CM OS input section consists of 4 or 8 dat a (D type) latches with associated comm on CLEAR, STROBE, .


Allegro MicroSystems A6801

and OUTPUT ENABLE circuitry. The power o utputs are bipolar NPN Darlingtons. Thi s merged technology provides versatile, flexible interface. These BiMOS power interface ICs greatly benefit the sim plification of computer or microproces sor I/O. .


Allegro MicroSystems A6801

.

Part

A6801

Description

DABiC-5 Latched Sink Drivers



Feature


A6800 and A6801 DABiC-5 Latched Sink Dri vers Features and Benefits ▪ 3.3 to 5 V logic supply range ▪ Up to 10 MHz data input rate ▪ High-voltage, high -current outputs ▪ Darlington current -sink outputs, with improved low-satura tion voltages ▪ CMOS, TTL compatible inputs ▪ Output transient protection ▪ Internal pull-down resistors ▪ Lo w-power CMOS latches Packages A68.
Manufacture

Allegro MicroSystems

Datasheet
Download A6801 Datasheet




 A6801
A6800 and A6801
DABiC-5 Latched Sink Drivers
Features and Benefits
3.3 to 5 V logic supply range
Up to 10 MHz data input rate
High-voltage, high-current outputs
Darlington current-sink outputs, with improved low-saturation
voltages
CMOS, TTL compatible inputs
Output transient protection
Internal pull-down resistors
Low-power CMOS latches
Packages
A6800
14-pin 7.62 mm DIP
(A package)
A6800
14-pin SOICN
(L package)
A6801
28-pin PLCC
(EP package)
Approximate scale 1:1
A6801
24-pin SOICW
(LW package)
Description
The A6800 and A6801 latched-input BiMOS ICs merge
high-current, high-voltage outputs with CMOS logic. The
CMOS input section consists of 4 or 8 data (D type) latches
with associated common CLEAR, STROBE, and OUTPUT
ENABLE circuitry. The power outputs are bipolar NPN
Darlingtons. This merged technology provides versatile,
exible interface. These BiMOS power interface ICs greatly
benet the simplication of computer or microproces-
sor I/O. The A6800 ICs each contain four latched drivers.
A6801 ICs contain eight latched drivers.
The CMOS inputs are compatible with standard CMOS
circuits. TTL circuits may mandate the addition of input
pull-up resistors. The bipolar Darlington outputs are suitable
for directly driving many peripheral/power loads: relays,
lamps, solenoids, small DC motors, and so forth.
All devices have open-collector outputs and integral diodes
for inductive load transient suppression. The output transis-
tors are capable of sinking 600 mA and can withstand at
least 50 V in the off state. Because of limitations on package
power dissipation, the simultaneous operation of all driv-
ers at maximum rated current can only be accomplished
by a reduction in duty cycle. Outputs may be paralleled for
higher load current capability.
Continued on the next page…
S UP P LY
V DD
IN N
Functional Block Diagram
C OMMON
OUT N
S TR OBE
CLE AR
OUTPUT E NABLE
C OMMON MOS C ONTR OL
TYP IC AL MOS LATC H
GR OUND
TYPIC AL BIPOLAR DR IVE
26180.110H




 A6801
A6800 and
A6801
DABiC-5 Latched Sink Drivers
Description (continued)
The A6800SA is furnished in a 14-pin DIP with 7.62 mm
(0.300 in.) row centers, the A6800SL and A6801SLW in surface-
mountable SOICs; and the A6801SEP in a 28-lead PLCC. These
devices are lead (Pb) free, with 100% matte tin plated leadframes.
Applications include:
Relays
Lamps
Solenoids
Small DC motors
Selection Guide
Part Number
Package
Packing
A6800SA-T*
14-pin DIP
25 per tube
A6800SLTR-T
14-pin SOIC
2500 per reel
A6801SEPTR-T
28-pin PLCC
800 per reel
A6801SLWTR-T
24-pin SOIC
1000 per reel
*Variant is in production but has been determined to be NOT FOR NEW DESIGN. This classification indicates that
sale of the variant is currently restricted to existing customer applications. The variant should not be purchased for
new design applications because obsolescence in the near future is probable. Samples are no longer available.
Status change: May 4, 2009.
Absolute Maximum Ratings*
Characteristic
Symbol
Notes
Rating
Output Voltage
VCE
50
Supply Voltage
VDD
7
Input Voltage Range
VIN
–0.3 to VDD + 0.3
Continuous Collector Current
IC
600
Operating Ambient Temperature
TA Range S
–20 to 85
Maximum Junction Temperature
TJ(max)
150
Storage Temperature
Tstg
–55 to 150
*Caution: CMOS devices have input-static protection, but are susceptible to damage when exposed to
extremely high static-electrical charges.
Units
V
V
V
mA
ºC
ºC
ºC
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2




 A6801
A6800 and
A6801
DABiC-5 Latched Sink Drivers
Allowable Power Dissipation
2.5
28-LEAD PLCC, RQJA = 68oC/W
14-PIN DIP, RQJA = 73oC/W
2.0
1.5 24-LEAD SOIC, RQJA = 85oC/W
1.0
0.5
0 25
14-LEAD SOIC, RQJA = 120oC/W
50 75 100 125
AMBIENT TEMPERATURE (ºC)
150
Typical Input Circuit
VDD
IN
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
3



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