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ASYNCHRONOUS FIFO. IDT72V85 Datasheet

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ASYNCHRONOUS FIFO. IDT72V85 Datasheet






IDT72V85 FIFO. Datasheet pdf. Equivalent




IDT72V85 FIFO. Datasheet pdf. Equivalent





Part

IDT72V85

Description

3.3 Volt CMOS DUAL ASYNCHRONOUS FIFO



Feature


3.3 Volt CMOS DUAL ASYNCHRONOUS FIFO DUA L 512 x 9, DUAL 1,024 x 9 DUAL 2,048 x 9, DUAL 4,096 X 9 DUAL 8,192 X 9 IDT72 V81 IDT72V82 IDT72V83 IDT72V84 IDT72V85 FEATURES: • The IDT72V81 is equival ent to two IDT72V01 - 512 x 9 FIFOs • The IDT72V82 is equivalent to two IDT7 2V02 - 1,024 x 9 FIFOs • The IDT72V83 is equivalent to two IDT72V03 - 2,048 x 9 FIFOs • The IDT72V84.
Manufacture

Integrated Device Technology

Datasheet
Download IDT72V85 Datasheet


Integrated Device Technology IDT72V85

IDT72V85; is equivalent to two IDT72V04 - 4,096 x 9 FIFOs • The IDT72V85 is equivalent to two IDT72V05 - 8,192 x 9 FIFOs • Low power consumption — Active: 330 m W (max.) — Power-down: 18 mW (max.) Ultra high speed—15 ns access time • Asynchronous and simultaneous read and write • Offers optimal combinati on of data capacity, small foot print a nd functional flexibility • Ideal .


Integrated Device Technology IDT72V85

for bidirectional, width expansion, dept h expansion, busmatching, and data sort ing applications • Status Flags: Empt y, Half-Full, Full • Auto-retransmit capability • High-performance CMOS™ technology • Space-saving TSSOP pac .


Integrated Device Technology IDT72V85

.

Part

IDT72V85

Description

3.3 Volt CMOS DUAL ASYNCHRONOUS FIFO



Feature


3.3 Volt CMOS DUAL ASYNCHRONOUS FIFO DUA L 512 x 9, DUAL 1,024 x 9 DUAL 2,048 x 9, DUAL 4,096 X 9 DUAL 8,192 X 9 IDT72 V81 IDT72V82 IDT72V83 IDT72V84 IDT72V85 FEATURES: • The IDT72V81 is equival ent to two IDT72V01 - 512 x 9 FIFOs • The IDT72V82 is equivalent to two IDT7 2V02 - 1,024 x 9 FIFOs • The IDT72V83 is equivalent to two IDT72V03 - 2,048 x 9 FIFOs • The IDT72V84.
Manufacture

Integrated Device Technology

Datasheet
Download IDT72V85 Datasheet




 IDT72V85
3.3 Volt CMOS DUAL ASYNCHRONOUS FIFO
DUAL 512 x 9, DUAL 1,024 x 9
DUAL 2,048 x 9, DUAL 4,096 X 9
DUAL 8,192 X 9
LEAD FINISH (SnPb) ARE IN EOL PROCESS - LAST TIME BUY EXPIRES JUNE 15, 2018
IDT72V81
IDT72V82
IDT72V83
IDT72V84
IDT72V85
FEATURES:
The IDT72V81 is equivalent to two IDT72V01 - 512 x 9 FIFOs
The IDT72V82 is equivalent to two IDT72V02 - 1,024 x 9 FIFOs
The IDT72V83 is equivalent to two IDT72V03 - 2,048 x 9 FIFOs
The IDT72V84 is equivalent to two IDT72V04 - 4,096 x 9 FIFOs
The IDT72V85 is equivalent to two IDT72V05 - 8,192 x 9 FIFOs
Low power consumption
— Active: 330 mW (max.)
— Power-down: 18 mW (max.)
Ultra high speed—15 ns access time
Asynchronous and simultaneous read and write
Offers optimal combination of data capacity, small foot print
and functional flexibility
Ideal for bidirectional, width expansion, depth expansion, bus-
matching, and data sorting applications
Status Flags: Empty, Half-Full, Full
Auto-retransmit capability
High-performance CMOS™ technology
Space-saving TSSOP package
Industrial temperature range (–40°C to +85°C) is available
Green parts available, see ordering information
DESCRIPTION:
The IDT72V81/72V82/72V83/72V84/72V85 are dual-FIFO memories that
load and empty data on a first-in/first-out basis. These devices are functional and
compatible to two IDT72V01/72V02/72V03/72V04/72V05 FIFOs in a single
package with all associated control, data, and flag lines assigned to separate
pins. The devices use Full and Empty flags to prevent data overflow and
underflow and expansion logic to allow for unlimited expansion capability in both
word size and depth.
The reads and writes are internally sequential through the use of ring
pointers, with no address information required to load and unload data. Data
is toggled in and out of the devices through the use of the Write (W) and Read
(R) pins.
The devices utilize a 9-bit wide data array to allow for control and parity
bitsattheuser’soption.Thisfeatureis especiallyusefulindatacommunications
applications where it is necessary to use a parity bit for transmission/reception
error checking. It also features a Retransmit (RT) capability that allows for reset
of the read pointer to its initial position when RT is pulsed low to allow for
retransmission from the beginning of data. A Half-Full Flag is available in the
single device mode and width expansion modes.
These FIFOs are fabricated using high-speed CMOS technology. They are
designed for those applications requiring asynchronous and simultaneous
read/writes in multiprocessing and rate buffer applications.
FUNCTIONAL BLOCK DIAGRAM
DATA INPUTS
(DA0-DA8)
RSA
WA
WRITE
CONTROL
WRITE
POINTER
RAM
ARRAY A
512 x 9
1,024 x 9
2,048 x 9
4,096 x 9
8,192 x 9
READ
POINTER
THREE-
STATE
BUFFERS
RA READ
CONTROL
FLAG
LOGIC
EXPANSION
LOGIC
XIA
XOA/HFA FFA EFA
DATA
OUTPUTS
(QA0-QA8)
RESET
LOGIC
FLA/RTA
WB
WRITE
CONTROL
DATA INPUTS
(DB0-DB8)
RSB
WRITE
POINTER
THREE-
STATE
BUFFERS
RAM
ARRAY A
512 x 9
1,024 x 9
2,048 x 9
4,096 x 9
8,192 x 9
READ
POINTER
READ
CONTROL
FLAG
LOGIC
EXPANSION
LOGIC
RB XIB
XOB/HFB FFB EFB
DATA
OUTPUTS
(QB0-QB8)
RESET
LOGIC
FLB/RTB
3966 drw 01
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. The AsyncFIFOis a trademark of Integrated Device Technology, Inc.
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
1
© 2017 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
NOVEMBER 2017
DSC-3966/6




 IDT72V85
IDT72V81/72V82/72V83/72V84/72V85 3.3V CMOS DUAL ASYNCHRONOUS FIFO
512 x 9, 1024 x 9, 2048 x 9, 4096 x 9, 8192 x 9
COMMERCIAL ANDINDUSTRIAL
TEMPERATURERANGES
PIN CONFIGURATION
FFA
QA0
QA1
QA2
QA3
QA8
GND
RA
QA4
QA5
QA6
QA7
XOA/HFA
EFA
FFB
QB0
QB1
QB2
QB3
QB8
GND
RB
QB4
QB5
QB6
QB7
XOB/HFB
EFB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56 XIA
55 DA0
54 DA1
53 DA2
52 DA3
51 DA8
50 WA
49 VCC
48 DA4
47 DA5
46 DA6
45 DA7
44 FLA/RTA
43 RSA
42 XIB
41 DB0
40 DB1
39 DB2
38 DB3
37 DB8
36 WB
35 VCC
34 DB4
33 DB5
32 DB6
31 DB7
30 FLB/RTB
29 RSB
3966 drw 02
TSSOP (SO56-2, order code: PA)
TOP VIEW
DC ELECTRICAL CHARACTERISTICS(1)
(Commercial: VCC = 3.3V±0.3V, TA = 0°C to +70°C;
Industrial: VCC = 3.3V±0.3V, TA = -40°C to +85°C)
ABSOLUTE MAXIMUM RATINGS
Symbol
Rating
Com'l & Ind'l
Unit
VTERM
TSTG
IOUT
Terminal Voltage
with Respect to GND
StorageTemperature
DC Output Current
–0.5 to +7.0
–55 to +125
–50 to +50
V
°C
mA
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation of
the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
RECOMMENDED DC OPERATING
CONDITIONS
Symbol
Parameter
Min. Typ. Max. Unit
VCC Supply Voltage
3.0 3.3 3.6 V
GND Supply Voltage
00
0V
VIH(1) Input High Voltage
2.0 — VCC+0.5 V
VIL(2) Input Low Voltage
— — 0.8 V
TA OperatingTemperatureCommercial 0 — 70 °C
TA OperatingTemperatureIndustrial -40 — 85 °C
NOTES:
1. For RT/RS/XI input, VIH = 2.6V (commercial and industrial).
2. 1.5V undershoots are allowed for 10ns once per cycle
CAPACITANCE (TA = +25°C, f = 1.0 MHz)
Symbol
Parameter(1)
Condition
CIN
COUT
Input Capacitance
Output Capacitance
VIN = 0V
VOUT = 0V
NOTE:
1. Characterized values, not currently tested.
Max.
8
8
Unit
pF
pF
Symbol
ILI(1)
ILO(2)
VOH
VOL
ICC1(3,4)
ICC2(3,5)
Parameter
Input Leakage Current (Any Input)
Output Leakage Current
Output Logic “1” Voltage IOH = –2mA
Output Logic “0” Voltage IOL = 8mA
Active Power Supply Current (both FIFOs)
Standby Current (R=W=RS=FL/RT=VIH)
NOTES:
1. Measurements with 0.4 VIN VCC.
2. R VIH, 0.4 VOUT VCC.
3. Tested with outputs open (IOUT = 0).
4. Tested at f = 20 MHz.
5. All Inputs = VCC - 0.2V or GND + 0.2V.
Commercial
tA = 15, 20 ns
Min. Max.
–1 1
–10 10
2.4 —
— 0.4
— 100
—5
AC TEST CONDITIONS
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
GND to 3.0V
5ns
1.5V
1.5V
See Figure 1
Industrial
tA = 20 ns
Min. Max.
–1 1
–10 10
2.4 —
— 0.4
— 120
—5
Unit
μA
μA
V
V
mA
mA
TO
OUTPUT
PIN
510Ω
3.3V
330Ω
30pF*
3966 drw 03
or equivalent circuit
Figure 1. Output Load
*Includes scope and jib capacitances.
2




 IDT72V85
IDT72V81/72V82/72V83/72V84/72V85 3.3V CMOS DUAL ASYNCHRONOUS FIFO
512 x 9, 1024 x 9, 2048 x 9, 4096 x 9, 8192 x 9
AC ELECTRICAL CHARACTERISTICS(1)
(Commercial: VCC = 3.3V±0.3V, TA = 0°C to +70°C; Industrial: VCC = 3.3V±0.3V, TA = -40°C to +85°C)
Commercial
IDT72V81L15
IDT72V82L15
IDT72V83L15
IDT72V84L15
IDT72V85L15
Symbol
tS
tRC
tA
tRR
tRPW
tRLZ
tWLZ
tDV
tRHZ
tWC
tWPW
tWR
tDS
tDH
tRSC
tRS
tRSS
tRSR
tRTC
tRT
tRTS
tRTR
tEFL
tHFH,FFH
tRTF
tREF
tRFF
tRPE
tWEF
tWFF
tWHF
tRHF
tWPF
tXOL
tXOH
tXI
tXIR
tXIS
Parameter
ShiftFrequency
Read Cycle Time
Access Time
Read Recovery Time
ReadPulseWidth(2)
Read Pulse Low to Data Bus at Low Z(3)
Write Pulse High to Data Bus at Low Z(3,4)
Data Valid from Read Pulse High
Read Pulse High to Data Bus at High Z(3)
Write Cycle Time
WritePulseWidth(2)
Write Recovery Time
DataSet-upTime
DataHoldTime
Reset Cycle Time
ResetPulseWidth(2)
ResetSet-upTime(3)
Reset Recovery Time
Retransmit Cycle Time
RetransmitPulseWidth(2)
RetransmitSet-upTime(3)
RetransmitRecoveryTime
Reset to Empty Flag Low
Reset to Half-Full and Full Flag High
Retransmit Low to Flags Valid
Read Low to Empty Flag Low
Read High to Full Flag High
Read Pulse Width after EF High
Write High to Empty Flag High
Write Low to Full Flag Low
Write Low to Half-Full Flag Low
Read High to Half-Full Flag High
Write Pulse Width after FFHigh
Read/Write to XOLow
Read/Write to XOHigh
XI Pulse Width(2)
XI Recovery Time
XISet-up Time
Min. Max.
— 40
25 —
— 15
10 —
15 —
3—
5—
5—
— 15
25 —
15 —
10 —
11 —
0—
25 —
15 —
15 —
10 —
25 —
15 —
15 —
10 —
— 25
— 25
— 25
— 15
— 15
15 —
— 15
— 15
— 25
— 25
15 —
— 15
— 15
15 —
10 —
10 —
NOTES:
1. Timings referenced as in AC Test Conditions.
2. Pulse widths less than minimum value are not allowed.
3. Values guaranteed by design, not currently tested.
4. Only applies to read data flow-through mode.
3
COMMERCIAL ANDINDUSTRIAL
TEMPERATURERANGES
Commercial & Industrial
IDT72V81L20
IDT72V82L20
IDT72V83L20
IDT72V84L20
IDT72V85L20
Min. Max.
— 33.3
30 —
— 20
10 —
20 —
3—
5—
5—
— 15
30 —
20 —
10 —
12 —
0—
30 —
20 —
20 —
10 —
30 —
20 —
20 —
10 —
— 30
— 30
— 30
— 20
— 20
20 —
— 20
— 20
— 30
— 30
20 —
— 20
— 20
20 —
10 —
10 —
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns






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