Z380 Datasheet: Microprocessor





Z380 Microprocessor Datasheet

Part Number Z380
Description Microprocessor
Manufacture Zilog
Total Page 30 Pages
PDF Download Download Z380 Datasheet PDF

Features: www.DataSheet4U.com ZILOG MICROPROCESS OR PRODUCT SPECIFICATION Z380™ MICR OPROCESSOR FEATURES s Static CMOS Desi gn with Low-Power Standby Mode Option 3 2-Bit Internal Data Paths and ALU s s Two-Clock Cycle Instruction Execution Minimum Four Banks of On-Chip Register Files Enhanced Interrupt Capabilities, Including 16-Bit Vector Undefined Opcod e Trap for Z380™ Instruction Set On-C hip I/O Functions: - Six-Memory Chip Se lects with Programmable Waits - Program mable I/O Waits - DRAM Refresh Controll er 100-Pin QFP Package s s s Operati ng Frequency - DC-to-18 MHz at 5V - DC- to-10 MHz at 3.3V Enhanced Instruction Set that Maintains Object-Code Compatib ility with Z80® and Z180™ Microproce ssors 16-Bit (64K) or 32-Bit (4G) Linea r Address Space 16-Bit Data Bus with Dy namic Sizing s s s s s s GENERAL D ESCRIPTION The Z380™ Microprocessor i s an integrated highperformance micropr ocessor with fast and efficient through put and increased memory addressing capabilities. The Z380™ offers a con.

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ZILOG
PRODUCT SPECIFICATION
MICROPROCESSOR
FEATURES
s Static CMOS Design with Low-Power Standby Mode
Option
s 32-Bit Internal Data Paths and ALU
s Operating Frequency
- DC-to-18 MHz at 5V
- DC-to-10 MHz at 3.3V
s Enhanced Instruction Set that Maintains Object-Code
Compatibility with Z80® and Z180Microprocessors
s 16-Bit (64K) or 32-Bit (4G) Linear Address Space
s 16-Bit Data Bus with Dynamic Sizing
Z380
MICROPROCESSOR
s Two-Clock Cycle Instruction Execution Minimum
s Four Banks of On-Chip Register Files
s Enhanced Interrupt Capabilities, Including
16-Bit Vector
s Undefined Opcode Trap for Z380Instruction Set
s On-Chip I/O Functions:
- Six-Memory Chip Selects with Programmable Waits
- Programmable I/O Waits
- DRAM Refresh Controller
s 100-Pin QFP Package
GENERAL DESCRIPTION
The Z380Microprocessor is an integrated high-
performance microprocessor with fast andefficientthrough-
put and increased memory addressing capabilities. The
Z380offers a continuing growth path for present Z80-or
Z180-based designs, while maintaining Z80® CPU and
Z180® MPU object-code compatibility. The Z380MPU
enhancements include an improved 280 CPU, expanded
4-Gbyte space and flexible bus interface timing.
An enhanced version of the Z80 CPU is key to the Z380
MPU. The basic addressing modes of the Z80 micropro-
cessor have been augmented as follows: Stack Pointer
Relative loads and stores, 16-bit and 24-bit indexed off-
sets, and more flexible Indirect Register addressing, with
all of the addressing modes allowing access to the entire
32-bit address space. Additions made to the instruction
set, include a full complement of 16-bit arithmetic and
logical operations, 16-bit I/O operations, multiply and
divide, plus a complete set of register-to-register loads
and exchanges.
The expanded basic register file of the Z80 MPU micropro-
cessor includes alternate register versions of the IX and IY
registers. There are four sets of this basic Z80 micropro-
cessor register file present in the Z380 MPU, along with the
necessary resources to manage switching between the
different register sets. All of the register-pairs and index
registers in the basic Z80 microprocessor register file are
expanded to 32 bits.
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