IEEE1394 LINK Layer / PCI Bridge LSI
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PRELIMINARY
IEEE1394 LINK Layer / PCI Bridge LSI
Overview The CXD1947Q is a single-chip implementat...
Description
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PRELIMINARY
IEEE1394 LINK Layer / PCI Bridge LSI
Overview The CXD1947Q is a single-chip implementation of the link layer protocol of the 1394 Serial Bus, with additional features to support the transaction and bus management layers. The CXD1947Q includes a PCI bus interface and multiple DMA engines to enable high performance bus transfers. Features 1394 Link Layer/PCI Bridge Conforms to IEEE1394 high speed Serial Bus Supports 100Mb/s and 200Mb/s 1394 bus speeds Conforms to PCI version 2.1 specification Supports 6 independent programmable DMA channels — Asynchronous transmit (1) — Asynchronous receive (1) — Isochronous transmit (2) — Isochronous receive (2) Three 128-word-deep FIFOs — Asynchronous transmit — Isochronous transmit — Receive Block Diagram
ITDMA ALIGN ITF
CXD1947Q
160 pin QFP
Includes interfaces to — 1394 PHY interface (CXD1944 or equivalent) — ROM (64K x 8) — Silicon Serial ROM Supports big and little Endian data formats Device Structure Silicon gate CMOS IC Recommended Operating Conditions Supply voltage VDD 3.0 to 3.6 Operating temperature range Topr –20 to +75
V °C
ATDMA MBIU PCI BUS PCI INF RDMA
ALIGN
ATF
RF ALIGN
LINK CORE
PHY
IRDMA
SSN INF
ROM INF
CNTL REG
MBIU: Master Bus Interface ITDMA: Isochronous Transmit DMA ATDMA: Asynchronous Transmit DMA RDMA: Receive DMA IRDMA: Isochronous Receive DMA www.DataSheet4U.com
ALIGN: ITF: ATF: RF: SSN INF:
Data Aligner Isochronous Transmit FIFO Asynchronous Trans...
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