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Part Number 8086
Manufacturers Intersil
Logo Intersil
Description CMOS 16-Bit Microprocessor
Datasheet 8086 Datasheet8086 Datasheet (PDF)

www.DataSheet4U.com 80C86 March 1997 CMOS 16-Bit Microprocessor Description The Intersil 80C86 high performance 16-bit CMOS CPU is manufactured using a self-aligned silicon gate CMOS process (Scaled SAJI IV). Two modes of operation, minimum for small systems and maximum for larger applications such as multiprocessing, allow user configuration to achieve the highest performance level. Full TTL compatibility (with the exception of CLOCK) and industry standard operation allow use of existing NMOS .

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www.DataSheet4U.com 80C86 March 1997 CMOS 16-Bit Microprocessor Description The Intersil 80C86 high performance 16-bit CMOS CPU is manufactured using a self-aligned silicon gate CMOS process (Scaled SAJI IV). Two modes of operation, minimum for small systems and maximum for larger applications such as multiprocessing, allow user configuration to achieve the highest performance level. Full TTL compatibility (with the exception of CLOCK) and industry standard operation allow use of existing NMOS 8086 hardware and software designs. Features • Compatible with NMOS 8086 • Completely Static CMOS Design - DC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5MHz (80C86) - DC . . . . . . . . . . . . . . . . . . . . . . . . . . . .8MHz (80C86-2) • Low Power Operation - lCCSB . . . . . . . . . . . . . . . . . . . . . . . . . . . . .500µA Max - ICCOP . . . . . . . . . . . . . . . . . . . . . . . . . 10mA/MHz Typ • 1MByte of Direct Memory Addressing Capability • 24 Operand Addressing Modes • Bit, Byte, Word and Block Move Operations • 8-Bit and 16-Bit Signed/Unsigned Arithmetic - Binary, or Decimal - Multiply and Divide • Wide Operating Temperature Range - C80C86 . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to +70oC - l80C86 . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to +85oC - M80C86 . . . . . . . . . . . . . . . . . . . . . . . -55oC to +125oC [ /Title (80C86 ) /Subject (CMO S 16Bit Microprocessor) /Autho r () /Keywords (Intersil Corporation, Intersil Corporation, 16 Bit uP, microprocessor, 8086, PC) /Cre- Ordering Information PACKAGE PDIP TEMP. RANGE 0oC to +70oC 0oC 0oC -55oC SMD# CLCC SMD# +70oC +70oC +125oC 5MHz CP80C86 8MHz PKG. NO. CP80C86-2 E40.6 IP80C86-2 E40.6 -40oC to +85oC lP80C86 PLCC to CS80C86 -40oC to +85oC lS80C86 CERDIP to CD80C86 -40oC to +85oC ID80C86 to CS80C86-2 N44.65 IS80C86-2 N44.65 CD80C86-2 F40.6 ID80C86-2 F40.6 F40.6 MD80C86/B MD80C862/B -55oC to +125oC 8405201QA 8405202QA F40.6 -55oC to +125oC MR80C86/B MR80C862/B J44.A -55oC to +125oC 8405201XA 8405202XA J44.A www.DataSheet4U.com CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 File Number 2957.1 3-141 www.DataSheet4U.com 80C86 Pinouts 80C86 (DIP) TOP VIEW GND AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 NMI INTR CLK GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 MAX 40 VCC 39 AD15 38 A16/S3 37 A17/S4 36 A18/S5 35 A19/S6 34 BHE/S7 33 MN/MX 32 RD 31 RQ/GT0 30 RQ/GT1 29 LOCK 28 S2 27 S1 26 S0 25 QS0 24 QS1 23 TEST 22 READY 21 RESET (HOLD) (HLDA) (WR) (M/IO) (DT/R)) (DEN) (ALE) (INTA) (MIN) 80C86 (PLCC, CLCC) TOP VIEW A16/S3 A16/S3 A17/S4 A18/S5 A17/S4 A18/S5 39 38 AD11 AD12 AD13 AD14 MAX MODE 80C86 AD11 AD12 AD13 AD14 MIN MODE 80C86 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 7 8 9 10 11 12 13 14 15 16 17 6 5 4 3 2 1 44 43 42 41 40 AD15 GND VCC NC AD15 GND VCC NC NC A19/S6 NC A19/S6 BHE/S7 MN/MX RD RQ/GT0 RQ/GT1 LOCK S2 S1 S0 37 BHE/S7 36 35 34 33 32 31 30 29 18 19 20 21 22 23 24 25 26 27 28 MN/MX RD HOLD HLDA WR M/IO DT/R DEN READY RESET TEST INTR INTA GND CLK ALE NMI NC NC MIN MODE 80C86 MAX MODE 80C86 READY RESET TEST INTR GND CLK www.DataSheet4U.com 3-142 QS1 QS0 NMI NC NC www.DataSheet4U.com 80C86 Functional Diagram EXECUTION UNIT REGISTER FILE DATA POINTER AND INDEX REGS (8 WORDS) BUS INTERFACE UNIT RELOCATION REGISTER FILE SEGMENT REGISTERS AND INSTRUCTION POINTER (5 WORDS) 16-BIT ALU FLAGS BUS INTERFACE UNIT 4 16 3 4 BHE/S7 A19/S6 A16/S3 AD15-AD0 INTA, RD, WR DT/R, DEN, ALE, M/IO 6-BYTE INSTRUCTION QUEUE TEST INTR NMI RQ/GT0, 1 HOLD HLDA 3 RESET READY MN/MX GND VCC 2 CONTROL AND TIMING LOCK 2 3 QS0, QS1 S2, S1, S0 CLK MEMORY INTERFACE C-BUS B-BUS ES BUS INTERFACE UNIT CS SS DS IP INSTRUCTION STREAM BYTE QUEUE EXECUTION UNIT CONTROL SYSTEM A-BUS AH BH CH EXECUTION UNIT DH SP BP SI DI AL BL CL DL ARITHMETIC/ LOGIC UNIT www.DataSheet4U.com FLAGS 3-143 www.DataSheet4U.com 80C86 Pin Description The following pin function descriptions are for 80C86 systems in either minimum or maximum mode. The “Local Bus” in these description is the direct multiplexed bus interface connection to the 80C86 (without regard to additional bus buffers). PIN NUMBER 2-16, 39 SYMBOL AD15-AD0 TYPE I/O DESCRIPTION ADDRESS DATA BUS: These lines constitute the time multiplexed memory/lO address (T1) and data (T2, T3, TW, T4) bus. A0 is analogous to BHE for the lower byte of the data bus, pins D7D0. It is LOW during Ti when a byte is to be transferred on the lower portion of the bus in memory or I/O operations. Eight-bit oriented devices tied to the lower half would normally use A0 to condition chip select functions (See BHE). These lines are active HIGH and are held at high impedance to the last valid logic level during interrupt acknowl.


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