10/100 Mbps FAST ETHERNET PHYSICAL LAYER SINGLE CHIP TRANSCEIVER
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DM9161
10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver 1. General Description
The ...
Description
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DM9161
10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver 1. General Description
The DM9161 is a physical layer, single-chip, and low power transceiver for 100BASE-TX and 10BASE-T operations. On the media side, it provides a direct interface either to Unshielded Twisted Pair Category 5 Cable (UTP5) for 100BASE-TX Fast Ethernet, or UTP5/UTP3 Cable for 10BASE-T Ethernet. Through the Media Independent Interface (MII), the DM9161 connects to the Medium Access Control (MAC) layer, ensuring a high inter operability from different vendors. The DM9161 uses a low power and high performance CMOS process. It contains the entire physical layer functions of 100BASE-TX as defined by IEEE802.3u, including the Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA), Twisted Pair Physical Medium Dependent Sublayer (TP-PMD), 10BASE-TX Encoder/Decoder (ENC/DEC), and Twisted Pair Media Access Unit (TPMAU). The DM9161 provides a strong support for the autonegotiation function, utilizing automatic media speed and protocol selection. Furthermore, due to the built-in wave shaping filter, the DM9161 needs no external filter to transport signals to the media in 100BASE-TX or 10BASE-T Ethernet operation.
2. Block Diagram
100Base-TX 100Base-TX Transceiver PCS
MII Interface
10Base-T TX/RX Module LED Driver Auto-Negotiation
Clock Circuit Block
Biasing/ Power Block
MII Register
MII Management Control
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Final Version: DM9161-DS-F02 May 1...
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