LVC4245A

www.DataSheet.co.kr SN74LVC4245A OCTAL BUS TRANSCEIVER AND 3.3-V TO 5-V SHIFTER WITH 3-STATE OUTPUTS SCAS375D – MARCH 1994 – REVISED JUNE 1998 D D D D EPIC ™ (Enhanced-Performance Implanted CMOS) Submicron Process 3.3-V to 5-V Bidirectional Level Shifter Latch-Up Performance Exceeds 250 mA Per JESD 17 Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages DB, DW, OR PW PACKAGE (TOP VIEW) description This 8-bit (octal) noninverting bus transceiver contains two separate supply rails; B port has VCCB, which is set at 3.3 V, and A port has VCCA, which is set at 5 V. This allows for translation from a 3.3-V to a 5-V environment, and vice versa. (5 V) VCCA DIR A1 A2 A3 A4 A5 A6 A7 A8 GND GND 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VCCB (3.3 V) VCCB (3.3 V) OE B1 B2 B3 B4 B5 B6 B7 B8 GND The SN74LVC4245A is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are effectively isolated. The SN74LVC4245A pinout allows the designer to switch to a normal all-3.3-V or all-5-V 20-pin ’245 device without board re-layout. The designer uses the data paths for pins 2 –11 and 14 –23 of the SN74LVC4245A to align with the conventional ’245 pinout. The SN74LVC4245A i...