TC74HCT373AP

TC74HCT373AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HCT373AP, TC74HCT373AF Octal D-Type Latch with 3-State Output The TC74HCT373A is a high speed CMOS OCTAL LATCH with 3-STATE OUTPUT fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. Their inputs are compatible with TTL, NMOS, and CMOS output voltage levels. These 8-bit D-type latches are controlled by a latch enable input (LE) and an output enable input ( OE ). When the OE input is high, the eight outputs are in a high impedance state. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Features High speed: tpd = 17 ns (typ.) at VCC = 5 V Low power dissipation: ICC = 4 μA (max) at Ta = 25°C Compatible with TTL outputs: VIH = 2 V (min) VIL = 0.8 V (max) Wide interfacing ability: LSTTL, NMOS, CMOS Output drive capability: 15 LSTTL loads Symmetrical output impedance: |IOH| = IOL = 6 mA (min) Balanced propagation delays: tpLH ∼− tpHL Pin and function compatible with 74LS373 Pin Assignment TC74HCT373AP TC74HCT373AF Weight DIP20-P-300-2.54A SOP20-P-300-1.27A : 1.30 g (typ.) : 0.22 g (typ.) Start of commercial production 1988-11 1 2014-03-01 IEC Logic Symbol TC74HCT373AP/AF Truth Table Inputs OE LE D H X X L L X L H L L H H Output Q Z Qn L H X: Don’t care Z: High impedance Qn: Q outputs are latched at t...