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RD38F4455LVY Dataheets PDF



Part Number RD38F4455LVY
Manufacturers Intel
Logo Intel
Description (RD38F4455LVY / RD38F4050L0Z) Wireless Memory System
Datasheet RD38F4455LVY DatasheetRD38F4455LVY Datasheet (PDF)

www.DataSheet4U.com Intel StrataFlash£ Wireless Memory System (LV18/LV30 SCSP) 768-Mbit LVQ Family with Asynchronous Static RAM Datasheet Product Features ■ ■ ■ ■ ■ Device Architecture ■ xRAM Performance — Code and data segment: 128- and 256— PSRAM at 1.8 V I/O : 85 ns initial Mbit density; PSRAM: 32- and 64-Mbit access, 30 ns async page reads; 65 ns density; SRAM: 8 Mbit density. initial access, 18 ns async page. — Top or bottom parameter configuration. — SRAM at 1.8 or 3.0 V I/O: 70 ns.

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www.DataSheet4U.com Intel StrataFlash£ Wireless Memory System (LV18/LV30 SCSP) 768-Mbit LVQ Family with Asynchronous Static RAM Datasheet Product Features ■ ■ ■ ■ ■ Device Architecture ■ xRAM Performance — Code and data segment: 128- and 256— PSRAM at 1.8 V I/O : 85 ns initial Mbit density; PSRAM: 32- and 64-Mbit access, 30 ns async page reads; 65 ns density; SRAM: 8 Mbit density. initial access, 18 ns async page. — Top or bottom parameter configuration. — SRAM at 1.8 or 3.0 V I/O: 70 ns initial access. — Asymmetrical blocking structure. ■ Flash Performance — 16-KWord parameter blocks (Top or — Code Segment at 1.8 V I/O: 85 ns initial Bottom); 64-K Word main blocks. access; 25 ns async page read; 14 ns — Zero-latency block locking. sync reads (tCHQV); 54 MHz CLK. — Absolute write protection with block — Data Segment at 1.8 V I/O: 170 ns initial lock down using F-WP#. access; 55 ns async page read. Device Voltage ■ Flash Architecture — Core: VCC = 1.8 V (typ). — Hardware Read-While-Write/Erase. — I/O: VCCQ = 1.8 V or 3.0 V (typ). DataSheet4U.com— 8-Mbit or 16-Mbit Multi-Partition. Device Concurrent Operations (3 Dies) — 2-Kbit One-Time Programmable (OTP) — Buffered EFP: 600 KB per second. Protection Register. — Erase Performance: 384 KB per second — Software Read-While-Write/Erase. (main blocks). — Single Full-Die Partition size. Device Packaging ■ Flash Software — 88 balls (8 x 10 active ball matrix). — Intel£ FDI, Intel£ PSM, and Intel£ — Area: 8 x 10 mm or 8 x 11 mm. VFM. — Height: 1.0 mm to 1.4 mm. — Common Flash Interface (CFI). Quality and Reliability — Basic/Extended Command Set. — Extended Temp: –25 °C to +85 °C. — Minimum 100 K flash block erase cycle. DataShee The Intel StrataFlash® Wireless Memory System (LV18/LV30 SCSP); 768-Mbit LVQ Family with Asynchronous Static RAM device offers a high performance code and large embedded data segment plus RAM combination in a common package with electrical QUAD+ ballout on 0.13 µm ETOX™ VIII flash technology. The code segment flash die features 1.8 V low-power operations with flexible, multi-partition, dual operation Read-While-Write / Read-While-Erase, asynchronous and synchronous burst reads at 54 MHz. The data segment flash die features 1.8 V low-power operations optimized for cost sensitive asynchronous data applications. This device integrates up to three flash dies, two PSRAM dies, and one SRAM die in a low-profile package compatible with other SCSP families using the QUAD+ ballout package. Notice: This document contains information on new products in production. The specifications are subject to change without notice. Verify with your local Intel sales office that you have the latest datasheet before finalizing a design. 253852-002 December 2003 DataSheet4U.com DataSheet4U.com DataSheet 4 U .com www.DataSheet4U.com et4U.com DataShee DataSheet4U.com INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The LV18/LV30 SCSP datasheet may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800-548-4725 or by visiting Intel's website at http://www.intel.com. *Other names and brands may be claimed as the property of others. Copyright © Intel Corporation, 2003 DataSheet4U.com 2 Datasheet DataSheet4U.com DataSheet 4 U .com www.DataSheet4U.com Contents Contents 1.0 Introduction ....................................................................................................................................5 1.1 1.2 1.3 2.0 3.0 2.1 3.1 3.2 3.3 3.4 3.5 4.0 5.0 4.1 5.1 5.2 6.0 7.0 6.1 7.1 7.2 7.3 7.4 7.5 7.6 8.0 9.0 Nomenclature .................................


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