93C46 Datasheet: AT93C46





93C46 AT93C46 Datasheet

Part Number 93C46
Description AT93C46
Manufacture ATMEL
Total Page 14 Pages
PDF Download Download 93C46 Datasheet PDF

Features: 1. Features • Medium-voltage and Stand ard-voltage Operation – 2.7 (VCC = 2. 7V to 5.5V) • User-selectable Interna l Organization – 1K: 128 x 8 or 64 x 16 • Three-wire Serial Interface • 2 MHz Clock Rate (5V) • Self-timed Wr ite Cycle (10 ms max) • High Reliabil ity – Endurance: 1 Million Write Cycl es – Data Retention: 100 Years • 8- lead TSSOP and 8-lead JEDEC SOIC Packag es 2. Description The AT93C46 provides 1024 bits of serial electrically erasa ble programmable read only memory (EEPR OM) organized as 64 words of 16 bits ea ch, when the ORG pin is connected to VC C and 128 words of 8 bits each when it is tied to ground. The device is optimi zed for use in many automotive applicat ions where low power and low voltage op erations are essential. The AT93C46 is available in space-saving 8-lead TSSOP and 8-lead JEDEC SOIC packages. The AT9 3C46 is enabled through the Chip Select pin (CS), and accessed via a 3-wire se rial interface consisting of Data Input (DI), Data Output (DO), and Shift Clock (SK)..

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1. Features
Medium-voltage and Standard-voltage Operation
– 2.7 (VCC = 2.7V to 5.5V)
User-selectable Internal Organization
– 1K: 128 x 8 or 64 x 16
Three-wire Serial Interface
2 MHz Clock Rate (5V)
Self-timed Write Cycle (10 ms max)
High Reliability
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
8-lead TSSOP and 8-lead JEDEC SOIC Packages
2. Description
The AT93C46 provides 1024 bits of serial electrically erasable programmable read
only memory (EEPROM) organized as 64 words of 16 bits each, when the ORG pin is
connected to VCC and 128 words of 8 bits each when it is tied to ground. The device
is optimized for use in many automotive applications where low power and low voltage
operations are essential. The AT93C46 is available in space-saving 8-lead TSSOP
and 8-lead JEDEC SOIC packages. The AT93C46 is enabled through the Chip Select
pin (CS), and accessed via a 3-wire serial interface consisting of Data Input (DI), Data
Output (DO), and Shift Clock (SK). Upon receiving a Read instruction at DI, the
address is decoded and the data is clocked out serially on the data output pin DO. The
WRITE cycle is completely self-timed and no separate erase cycle is required before
write. The Write cycle is only enabled when it is in the Erase/Write Enable state. When
CS is brought “high” following the initiation of a write cycle, the DO pin outputs the
Ready/Busy status.
Table 2-1.
Pin Name
CS
SK
DI
DO
GND
VCC
ORG
Pin Configuration
Function
Chip Select
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
Power Supply
Internal Organization
8-lead SOIC
CS 1
SK 2
DI 3
DO 4
8 VCC
7 DC
6 ORG
5 GND
8-lead TSSOP
CS 1
SK 2
DI 3
DO 4
8 VCC
7 DC
6 ORG
5 GND
Three-wire
Automotive
Temperature
Serial
EEPROMs
1K (128 x 8 or 64 x 16)
AT93C46
Rev. 5125C–SEEPR–11/07

                    
                    






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