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CS4339 Dataheets PDF



Part Number CS4339
Manufacturers Cirrus Logic
Logo Cirrus Logic
Description Stereo D/A Converter
Datasheet CS4339 DatasheetCS4339 Datasheet (PDF)

Confidential Draft 6/6/17 CS4334/5/8/9 8-Pin, 24-Bit, 96 kHz Stereo D/A Converter Features  Complete Stereo DAC System: Interpolation, D/A, Output Analog Filtering  24-Bit Conversion  96 dB Dynamic Range  -88 dB THD+N  Low Clock-Jitter Sensitivity  Single +5 V Power Supply  Filtered Line-Level Outputs  On-Chip Digital De-emphasis  Popguard® Technology  Functionally Compatible with CS4330/31/33 Description The CS4334 family members are complete, stereo digital-to-analog output syste.

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Confidential Draft 6/6/17 CS4334/5/8/9 8-Pin, 24-Bit, 96 kHz Stereo D/A Converter Features  Complete Stereo DAC System: Interpolation, D/A, Output Analog Filtering  24-Bit Conversion  96 dB Dynamic Range  -88 dB THD+N  Low Clock-Jitter Sensitivity  Single +5 V Power Supply  Filtered Line-Level Outputs  On-Chip Digital De-emphasis  Popguard® Technology  Functionally Compatible with CS4330/31/33 Description The CS4334 family members are complete, stereo digital-to-analog output systems including interpolation, 1-bit D/A conversion and output analog filtering in an 8-pin package. The CS4334/5/8/9 support all major audio data interface formats, and the individual devices differ only in the supported interface format. The CS4334 family is based on Delta-Sigma modulation, where the modulator output controls the reference voltage input to an ultra-linear analog low-pass filter. This architecture allows for infinite adjustment of sample rate between 2 kHz and 100 kHz simply by changing the master clock frequency. The CS4334 family contains on-chip digital de-emphasis, operates from a single +5V power supply, and requires minimal support circuitry. These features are ideal for set-top boxes, DVD players, SVCD players, and A/V receivers. ORDERING INFORMATION See “Ordering Information” on page 24 LRCK 3 SDATA 1 Serial Input Interface DEM/SCLK 2 De-emphasis Interpolator  Modulator Interpolator  Modulator 4 MCLK AGND 6 VA 7 Voltage Reference Analog DAC Low-Pass AOUTL Filter 8 Analog DAC Low-Pass Filter AOUTR 5 http://www.cirrus.com Copyright  Cirrus Logic, Inc. 2012–2017 (All Rights Reserved) JUNE '17 DS248F7 CS4334/5/8/9 TABLE OF CONTENTS 1. TYPICAL CONNECTION DIAGRAM .................................................................................................... 4 2. CHARACTERISTICS AND SPECIFICATIONS ..................................................................................... 5 SPECIFIED OPERATING CONDITIONS .............................................................................................. 5 ABSOLUTE MAXIMUM RATINGS ........................................................................................................ 5 ANALOG CHARACTERISTICS............................................................................................................. 6 POWER AND THERMAL CHARACTERISTICS ................................................................................... 8 DIGITAL INPUT CHARACTERISTICS .................................................................................................. 9 SWITCHING CHARACTERISTICS ..................................................................................................... 10 3. GENERAL DESCRIPTION ................................................................................................................. 12 3.1 Digital Interpolation Filter .............................................................................................................. 12 3.2 Delta-Sigma Modulator ................................................................................................................. 12 3.3 Switched-Capacitor DAC .............................................................................................................. 12 3.4 Analog Low-Pass Filter ................................................................................................................. 12 4. SYSTEM DESIGN ............................................................................................................................... 13 4.1 Master Clock ................................................................................................................................. 13 4.2 Serial Clock .................................................................................................................................. 13 4.2.1 External Serial Clock Mode ................................................................................................. 13 4.2.2 Internal Serial Clock Mode .................................................................................................. 13 4.3 De-Emphasis ................................................................................................................................ 14 4.4 Initialization and Power-Down ...................................................................................................... 14 4.5 Output Transient Control .............................................................................................................. 14 4.6 Grounding and Power Supply Decoupling .................................................................................... 15 4.7 Analog Output and Filtering .......................................................................................................... 15 4.8 Overall Base-Rate Frequency Response .......................................................


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