Multi-Chip Package. M36P0R9070E0 Datasheet

M36P0R9070E0 Package. Datasheet pdf. Equivalent


ST Microelectronics M36P0R9070E0
www.DataSheet4U.com
M36P0R9070E0
512 Mbit (x16, Multiple Bank, Multi-Level, Burst) Flash Memory
128 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package
PRELIMINARY DATA
Features summary
Multi-chip package
– 1die of 512 Mbit (32Mb x 16, Multiple Bank,
Multi-Level, Burst) Flash Memory
– 1 die of 128Mbit (8Mb x16) PSRAM
FBGA
Supply voltage
– VDDF = VCCP = VDDQ = 1.7 to 1.95V
– VPPF = 9V for fast program (12V tolerant)
Electronic signature
– Manufacturer Code: 20h
– Device Code: 8819
Package
– ECOPACK®
TFBGA107 (ZAC)
Security
– 2112-bit user programmable OTP Cells
– 64-bit unique device number
100,000 program/erase cycles per block
Flash memory
Synchronous / asynchronous read
– Synchronous Burst Read mode:
108MHz, 66MHz
– Asynchronous Page Read mode
– Random Access: 93ns
Programming time
Block locking
– All Blocks locked at power-up
DataSheet4U.comAny combination of Blocks can be locked
with zero latency
– WPF for Block Lock-Down
– Absolute Write Protection with VPPF = VSS
Common Flash Interface (CFI)
– 4µs typical Word program time using Buffer
Enhanced Factory Program command
PSRAM
Access time: 70ns
Memory organization
– Multiple Bank Memory Array: 64 Mbit
Banks
– Four Extended Flash Array (EFA) Blocks of
64 Kbits
Dual operations
– program/erase in one Bank while read in
others
Asynchronous Page Read
– Page Size: 4, 8 or 16 Words
– Subsequent read within page: 20ns
Low power features
– Partial Array Self Refresh (PASR)
– Deep Power-Down mode (DPD)
Synchronous Burst Read/Write
– No delay between read and write
operations
DataShee
November 2005
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
DataSheet4U.com
Rev. 1
1/26
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M36P0R9070E0 Datasheet
Recommendation M36P0R9070E0 Datasheet
Part M36P0R9070E0
Description Multi-Chip Package
Feature M36P0R9070E0; www.DataSheet4U.com M36P0R9070E0 512 Mbit (x16, Multiple Bank, Multi-Level, Burst) Flash Memory 128.
Manufacture ST Microelectronics
Datasheet
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ST Microelectronics M36P0R9070E0
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Contents
M36P0R9070E0
Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Signal descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1 Address inputs (A0-A24) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2 Data input/output (DQ0-DQ15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3 Latch Enable (L) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Clock (K) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.5 Wait (WAIT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.6
2.7
2.8
2.9
2.10
2.11
2.12
2.13
2.14
2.15
2.16
2.17
2.18
2.19
2.20
2.21
2.22
Flash Chip Enable input (EF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Flash Output Enable inputs (GF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Flash Write Enable (WF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Flash Write Protect (WPF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Flash Reset (RPF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
PSRAM Chip Enable input (EP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
PSRAM Write Enable (WP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
PSRAM Output EnableD(aGtaPS) h.e.e.t4. U. .c.o.m. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
PSRAM Upper Byte Enable (UBP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
PSRAM Lower Byte Enable (LBP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
PSRAM Configuration Register Enable (CRP) . . . . . . . . . . . . . . . . . . . . . . . 11
Deep Power-Down input (DPDF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
VDDF Supply Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
VCCP Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
VDDQ Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
VPPF Program Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
VSS Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
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ST Microelectronics M36P0R9070E0
www.DataSheet4U.com
M36P0R9070E0
6 Package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
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