2.5/3.3V 1:4 PECL Clock Driver
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Freescale Semiconductor, Inc.
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order number: MC100ES6130 Rev 1...
Description
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Freescale Semiconductor, Inc.
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order number: MC100ES6130 Rev 1, 5/2004
2.5/3.3V 1:4 PECL Clock Driver with 2:1 Input MUX
The MC100ES6130 is a 2.5 GHz differential PECL 1:4 fanout buffer. The ES6130 offers a wide operating range of 2.5 V and 3.3 V and also features a 2:1 input MUX which is ideal for redundant clock switchover applications. This device also includes a synchronous enable pin that forces the outputs into a fixed logic state. Enable or disable state is initiated only after the outputs are in a LOW state to eliminate the possibility of a runt clock pulse. Features
MC100ES6130
DT SUFFIX 16 LEAD TSSOP PACKAGE CASE 948F
Freescale Semiconductor, Inc...
2 GHz maximum output frequency 25 ps maximum output-to-output skew 150 ps part-to-part skew 350 ps typical propagation delay 2:1 differential MUX input 2.5 / 3.3 V operating range LVPECL and HSTL input compatible 16-lead TSSOP package Temperature range –40°C to +85°C
ORDERING INFORMATION
Device MC100ES6130DT MC100ES6130DTR2 Package TSSOP-16 TSSOP-16
DataShee
Q0 Q0 1 2
DataSheet4U.com 16 V
CC
Q
D
15
EN
Q1 Q1
3
14
IN1
4
13
IN1
1
Q2 Q2
5 0
12
IN0 IN0
6 7 8
11 10
Q3 Q3
IN_SEL
9
VEE
Figure 1. 16-Lead Pinout (Top View) and Logic Diagram
© Motorola, Inc. 2004
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www.DataSheet4U.com
Freescale Semiconductor, Inc.
MC100ES6130
Table 1. Pin Descrip...
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