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STP200NF04 STB200NF04 - STB200NF04-1
N-CHANNEL 40V - 120 A - 3.3 mΩ TO-220/D²PAK/I²PAK STripFET™II MOSFET
Table 1: General Features
Type STB200NF04 STB200NF04-1 STP200NF04
s s
Figure 1: Package
ID 120 A 120 A 120 A Pw 310 W 310 W 310 W
3
3 1 2
VDSS 40 V 40 V 40 V
RDS(on) < 0.0037 Ω < 0.0037 Ω < 0.0037 Ω
STANDARD THRESHOLD DRIVE 100% AVALANCHE TESTED TO-220
1
D2PAK
Figure 2: Internal Schematic Diagram APPLICATIONS www.DataSheet4U.com s HIGH CURRENT, HIGH SWITCHING SPEED s AUTOMOTIVE
Table 2: Order Codes
SALES TYPE STB200NF04T4 STB200NF04-1 STP200NF04 MARKING B200NF04 B200NF04 P200NF04 PACKAGE D2PAK I2PAK TO-220 PACKAGING TAPE & REEL TUBE TUBE
Rev. 3 October 2004 1/15
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DESCRIPTION This MOSFET is the latest development of STMicroelectronics unique “Single Feature Size™” strip-based process. The resulting transistor shows extremely high packing density for low onresistance, rugged avalance characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility.
12
3
I2PAK
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STP200NF04 - STB200NF04 - STB200NF04-1
Table 3: Absolute Maximum ratings
Symbol VDS VDGR VGS ID (#) ID (#) IDM ( ) PTOT dv/dt (1) EAS (2) Tj Tstg Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 kΩ) Gate- source Voltage Drain Current (continuos) at TC = 25°C Drain Current (continuos) at TC = 100°C Drain Current (pulsed) Total Dissipation at TC = 25°C Derating Factor Peak Diode Recovery voltage slope Single Pulse Avalanche Energy Operating Junction Temperature Storage Temperature Value 40 40 ± 20 120 120 480 310 2.07 1.5 1.3 -55 to 175 Unit V V V A A A W W/°C V/ns J °C
( ) Pulse width limited by safe operating area (1) ISD ≤ 120A, di/dt ≤500A/µs, VDD ≤ V(BR)DSS, T j ≤ TJMAX. (2) Starting Tj = 25°C, Id = 60A, VDD=30 V (#) Current Limited by Package
Table 4: Thermal Data
Rthj-case Rthj-pcb Rthj-amb Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-pcb Max Thermal Resistance Junction-ambient (Free air) Max Maximum Lead Temperature For Soldering Purpose 0.48 (see Figure 17) 62.5 300 °C/W °C/W °C/W °C
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ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED) Table 5: On/Off
Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on) Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Gate Threshold Voltage Static Drain-source On Resistance Test Conditions ID = 250 µA, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 °C VGS = ± 20V VDS = VGS, ID = 250µA VGS = 10V, ID = 90 A 2 3.3 Min. 40 1 10 ±100 4 3.7 Typ. Max. Unit V µA µA nA V mΩ
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TO-220 / I2PAK / D2PAK
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STP200NF04 - STB200NF04 - STB200NF04-1
ELECTRICAL CHARACTERISTICS (CONTINUED) Table 6: Dynamic
Symbol gfs (1) Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS = 15 V, ID = 90 A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 150 5100 1600 600 Max. Unit S pF pF pF
Table 7: Switching On/Off
Symbol td(on) tr td(off) tf Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDD = 20 V, ID = 90 A RG = 4.7Ω VGS = 10 V (see Figure 20) VDD = 20V, ID = 120 A, VGS = 10V (see Figure 23) Min. Typ. 30 320 140 120 170 30 62 210 Max. Unit ns ns ns ns nC nC nC
Table 8: Source Drain Diode
Symbol ISD ISDM (2) VSD (1) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 120 A, VGS = 0 VDD = 30V, Tj = 150°C www.DataSheet4U.com (see Figure 21) ISD = 120 A, di/dt = 100A/µs 85 190 4.5 Test Conditions Min. Typ. Max. 120 480 1.3 Unit A A V ns nC A
(1) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. (2) Pulse width limited by safe operating area.
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STP200NF04 - STB200NF04 - STB200NF04-1
Figure 3: Safe Operating Area Figure 6: Thermal Impedance
Figure 4: Output Characteristics
Figure 7: Transfer Characteristics
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Figure 5: Transconductance
Figure 8: Static Drain-source On Resistance
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STP200NF04 - STB200NF04 - STB200NF04-1
Figure 9: Gate Charge vs Gate-source Voltage Figure 12: Capacitance Variations
Figure 10: Normalized Gate Thereshold Voltage vs Temperature
Figure 13: Normalized On Resistance vs Temperature
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Figure 11: Dource-Drain Diode Forward Characteristics
Figure 14: Normalized Breakdown Voltage vs Temperature
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STP200NF04 - STB200NF04 - STB200NF04-1
Figure 15: Thermal Resistance Rthj-a vs PCB Copper Area Figure 16: Max Power Dissipation vs PCB Copper Area
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