MC74LVX244

www.DataSheet4U.com MOTOROLA SEMICONDUCTOR TECHNICAL DATA Octal Bus Buffer With 5V-Tolerant Inputs The MC74LVX244 is an advanced high speed CMOS non–inverting 3–state octal bus buffer and has two active low output enables. It is also designed to work with 3–state memory address drivers, etc. The inputs tolerate voltages up to 7V, allowing the interface of 5V systems to 3V systems. MC74LVX244 High Speed: tPD = 4.7ns (Typ) at VCC = 3.3V Low Power Dissipation: ICC = 4µA (Max) at TA = 25°C Power Down Protection Provided on Inputs Balanced Propagation Delays Low Noise: VOLP = 0.8V (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300mA ESD Performance: HBM > 2000V; Machine Model > 200V VCC 20 2OE 19 1O0 18 2D0 17 1O1 16 2D1 15 1O2 14 2D2 13 1O3 12 2D3 11 LOW–VOLTAGE CMOS LVX DW SUFFIX 20–LEAD SOIC PACKAGE CASE 751D–04 DT SUFFIX 20–LEAD TSSOP PACKAGE CASE 948E–02 1 1OE 2 1D0 3 2O0 4 1D1 5 2O1 6 1D2 7 2O2 8 1D3 9 2O3 10 GND M SUFFIX 20–LEAD SOIC EIAJ PACKAGE CASE 967–01 Figure 1. 20–Lead Pinout (Top View) 1OE 1 2OE 2 18 19 PIN NAMES 17 3 2O0 Pins nOE 1Dn, 2Dn 1On, 2On Function Output Enable Inputs Data Inputs 3–State Outputs 1D0 1O0 2D0 1D1 4 16 1O1 2D1 15 5 2O1 1D2 6 14 1O2 2D2 13 7 2O2 FUNCTION TABLE INPUTS OUTPUTS 1On, 2On L H Z 1D3 8 12 1O3 2D3 11 9 2O3 1OE, 2OE L L H 1Dn, 2Dn L H X Figure 2. Logic Diagram 6/97 © Motorola, Inc. 1997 1 REV 0 DataSheet 4 U ....